From: Varun Wadekar Date: Tue, 23 Aug 2016 21:01:19 +0000 (-0700) Subject: Tegra: fix logic to calculate GICD_ISPENDR register address X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=23cd470f868b6b40b520c84f8d643502aff74975;p=project%2Fbcm63xx%2Fatf.git Tegra: fix logic to calculate GICD_ISPENDR register address This patch uses GICD_BASE to calculate the GICD_ISPENDR regsiter address in the platform's 'plat_crash_print_regs' routine. Reported by: Seth Eatinger Change-Id: Ic7be29abc781f475ad25b59582ae60a0a2497377 Signed-off-by: Varun Wadekar --- diff --git a/plat/nvidia/tegra/include/plat_macros.S b/plat/nvidia/tegra/include/plat_macros.S index 1afe4545..7db69308 100644 --- a/plat/nvidia/tegra/include/plat_macros.S +++ b/plat/nvidia/tegra/include/plat_macros.S @@ -52,7 +52,7 @@ spacer: */ .macro plat_crash_print_regs mov_imm x16, TEGRA_GICC_BASE - cbz x16, 1f + /* gicc base address is now in x16 */ adr x6, gicc_regs /* Load the gicc reg list to x6 */ /* Load the gicc regs to gp regs used by str_in_crash_buf_print */ @@ -63,6 +63,7 @@ spacer: bl str_in_crash_buf_print /* Print the GICD_ISPENDR regs */ + mov_imm x16, TEGRA_GICD_BASE add x7, x16, #GICD_ISPENDR adr x4, gicd_pend_reg bl asm_print_str