From: Reto Schneider <reto.schneider@husqvarnagroup.com>
Date: Fri, 11 Jun 2021 09:19:51 +0000 (+0200)
Subject: ramips: mt7628: fix memory controller reset bit
X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=2293f1abe4d17c9ed9593f4e24fc73836f99dea5;p=openwrt%2Fstaging%2Fjow.git

ramips: mt7628: fix memory controller reset bit

According to MediaTek MT7688 Datasheet v1.4, as well as the MT7628
counterpart, the memory controller reset bit (MC_RST) is 10, not 20.
Reset bit 20 is used for for UART 2 (UART2_RST).

Please note: Due to the lack of hardware, I was not able to test this
change.

Signed-off-by: Reto Schneider <reto.schneider@husqvarnagroup.com>
---

diff --git a/target/linux/ramips/dts/mt7628an.dtsi b/target/linux/ramips/dts/mt7628an.dtsi
index 7bc001207b..8ef73dce80 100644
--- a/target/linux/ramips/dts/mt7628an.dtsi
+++ b/target/linux/ramips/dts/mt7628an.dtsi
@@ -76,7 +76,7 @@
 			compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
 			reg = <0x300 0x100>;
 
-			resets = <&rstctrl 20>;
+			resets = <&rstctrl 10>;
 			reset-names = "mc";
 
 			interrupt-parent = <&intc>;