From: Paul Cercueil <paul@crapouillou.net>
Date: Thu, 10 May 2018 18:47:44 +0000 (+0200)
Subject: watchdog: JZ4740: Disable clock after stopping counter
X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=212c105481ef9e76b972a91ae0ab477a9117ed2b;p=openwrt%2Fstaging%2Fblogic.git

watchdog: JZ4740: Disable clock after stopping counter

Previously, the clock was disabled first, which makes the watchdog
component insensitive to register writes.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Cc: Wim Van Sebroeck <wim@linux-watchdog.org>
Cc: Mathieu Malaterre <malat@debian.org>
Cc: linux-watchdog@vger.kernel.org
Cc: linux-mips@linux-mips.org
Signed-off-by: James Hogan <jhogan@kernel.org>
---

diff --git a/drivers/watchdog/jz4740_wdt.c b/drivers/watchdog/jz4740_wdt.c
index aafbeb96561b..55c9a1f26498 100644
--- a/drivers/watchdog/jz4740_wdt.c
+++ b/drivers/watchdog/jz4740_wdt.c
@@ -124,8 +124,8 @@ static int jz4740_wdt_stop(struct watchdog_device *wdt_dev)
 {
 	struct jz4740_wdt_drvdata *drvdata = watchdog_get_drvdata(wdt_dev);
 
-	jz4740_timer_disable_watchdog();
 	writeb(0x0, drvdata->base + JZ_REG_WDT_COUNTER_ENABLE);
+	jz4740_timer_disable_watchdog();
 
 	return 0;
 }