From: Icenowy Zheng <icenowy@aosc.io>
Date: Sun, 22 Jul 2018 13:27:30 +0000 (+0800)
Subject: drivers: mentor: mi2cv: add inverted interrupt clear flag quirk
X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=207199141312018cf9560fba32ae421324f041cb;p=project%2Fbcm63xx%2Fatf.git

drivers: mentor: mi2cv: add inverted interrupt clear flag quirk

The I2C controller on Allwinner SoCs after A31 has a inverted interrupt
clear flag, which needs to be written 1 (rather than 0 on Marvell SoCs
and old Allwinner SoCs) to clear.

Add such a quirk to mi2cv driver common code.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---

diff --git a/drivers/mentor/i2c/mi2cv.c b/drivers/mentor/i2c/mi2cv.c
index 618836ba..1b73e6f1 100644
--- a/drivers/mentor/i2c/mi2cv.c
+++ b/drivers/mentor/i2c/mi2cv.c
@@ -68,7 +68,11 @@ static void mentor_i2c_interrupt_clear(void)
 	uint32_t reg;
 
 	reg = mmio_read_32((uintptr_t)&base->control);
+#ifndef I2C_INTERRUPT_CLEAR_INVERTED
 	reg &= ~(I2C_CONTROL_IFLG);
+#else
+	reg |= I2C_CONTROL_IFLG;
+#endif
 	mmio_write_32((uintptr_t)&base->control, reg);
 	/* Wait for 1 us for the clear to take effect */
 	udelay(1);