From: Tony Lindgren Date: Tue, 19 Jan 2010 15:40:07 +0000 (+0100) Subject: ARM: 5884/1: arm: Fix DCC console for v7 X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=200b7a8dc09504bc0aedac567a307a6e533f39e5;p=openwrt%2Fstaging%2Fblogic.git ARM: 5884/1: arm: Fix DCC console for v7 Without this patch arch/arm/compressed/head.S defaults to generic DCC code that does not work for v7. For more information on the v7 DCC, see Cortex-A8 TRM "12.11.1 Debug communications channel". To use it with post 2.6.33-rc1 or later, you need to have: CONFIG_DEBUG_LL=y ONFIG_DEBUG_ICEDCC=y CONFIG_EARLY_PRINTK=y Earlier kernels need commit 93fd03a8c6728b58879f8af20ffd55d9c32a778b backported. Tested on omap3430. Signed-off-by: Tony Lindgren Signed-off-by: Russell King --- diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S index d356af7cef82..4fddc509e78e 100644 --- a/arch/arm/boot/compressed/head.S +++ b/arch/arm/boot/compressed/head.S @@ -27,6 +27,14 @@ .macro writeb, ch, rb mcr p14, 0, \ch, c0, c5, 0 .endm +#elif defined(CONFIG_CPU_V7) + .macro loadsp, rb + .endm + .macro writeb, ch, rb +wait: mrc p14, 0, pc, c0, c1, 0 + bcs wait + mcr p14, 0, \ch, c0, c5, 0 + .endm #elif defined(CONFIG_CPU_XSCALE) .macro loadsp, rb .endm diff --git a/arch/arm/boot/compressed/misc.c b/arch/arm/boot/compressed/misc.c index af6479fae931..56a0d116d271 100644 --- a/arch/arm/boot/compressed/misc.c +++ b/arch/arm/boot/compressed/misc.c @@ -53,6 +53,18 @@ static void icedcc_putc(int ch) asm("mcr p14, 0, %0, c0, c5, 0" : : "r" (ch)); } + +#elif defined(CONFIG_CPU_V7) + +static void icedcc_putc(int ch) +{ + asm( + "wait: mrc p14, 0, pc, c0, c1, 0 \n\ + bcs wait \n\ + mcr p14, 0, %0, c0, c5, 0 " + : : "r" (ch)); +} + #elif defined(CONFIG_CPU_XSCALE) static void icedcc_putc(int ch) diff --git a/arch/arm/kernel/debug.S b/arch/arm/kernel/debug.S index b121b6053cce..5c91addcaebc 100644 --- a/arch/arm/kernel/debug.S +++ b/arch/arm/kernel/debug.S @@ -49,6 +49,26 @@ 1002: .endm +#elif defined(CONFIG_CPU_V7) + + .macro addruart, rx + .endm + + .macro senduart, rd, rx + mcr p14, 0, \rd, c0, c5, 0 + .endm + + .macro busyuart, rd, rx +busy: mrc p14, 0, pc, c0, c1, 0 + bcs busy + .endm + + .macro waituart, rd, rx +wait: mrc p14, 0, pc, c0, c1, 0 + bcs wait + + .endm + #elif defined(CONFIG_CPU_XSCALE) .macro addruart, rx