From: Felix Fietkau Date: Mon, 13 Apr 2015 17:32:05 +0000 (+0000) Subject: bcm53xx: add missing l2 cache controller AUXCTL bit X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=1f70f452ccb3701fb34f4fd0fb624dbaf2120304;p=openwrt%2Fstaging%2Fzorun.git bcm53xx: add missing l2 cache controller AUXCTL bit Signed-off-by: Felix Fietkau SVN-Revision: 45416 --- diff --git a/target/linux/bcm53xx/patches-3.18/305-ARM-BCM53XX-set-customized-AUXCTL.patch b/target/linux/bcm53xx/patches-3.18/305-ARM-BCM53XX-set-customized-AUXCTL.patch index ab35ca6409..a2bed2aeb7 100644 --- a/target/linux/bcm53xx/patches-3.18/305-ARM-BCM53XX-set-customized-AUXCTL.patch +++ b/target/linux/bcm53xx/patches-3.18/305-ARM-BCM53XX-set-customized-AUXCTL.patch @@ -14,7 +14,7 @@ Signed-off-by: Hauke Mehrtens --- a/arch/arm/mach-bcm/bcm_5301x.c +++ b/arch/arm/mach-bcm/bcm_5301x.c -@@ -50,7 +50,11 @@ static const char __initconst *bcm5301x_ +@@ -50,7 +50,12 @@ static const char __initconst *bcm5301x_ }; DT_MACHINE_START(BCM5301X, "BCM5301X") @@ -23,6 +23,7 @@ Signed-off-by: Hauke Mehrtens + L310_AUX_CTRL_DATA_PREFETCH | + L310_AUX_CTRL_INSTR_PREFETCH | + L310_AUX_CTRL_EARLY_BRESP | ++ L2C_AUX_CTRL_SHARED_OVERRIDE | + L310_AUX_CTRL_FULL_LINE_ZERO, .l2c_aux_mask = ~0, .init_early = bcm5301x_init_early,