From: Richard Kuo <rkuo@codeaurora.org>
Date: Fri, 1 Mar 2013 19:16:15 +0000 (-0600)
Subject: Hexagon: add IOMEM and _relaxed IO macros
X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=1ce81f4f8727f42c052fe814f3df20bc92fdb168;p=openwrt%2Fstaging%2Fblogic.git

Hexagon: add IOMEM and _relaxed IO macros

Signed-off-by: Richard Kuo <rkuo@codeaurora.org>
---

diff --git a/arch/hexagon/include/asm/io.h b/arch/hexagon/include/asm/io.h
index e527cfeff5ba..6199ed5f064b 100644
--- a/arch/hexagon/include/asm/io.h
+++ b/arch/hexagon/include/asm/io.h
@@ -40,6 +40,8 @@
 #define IO_SPACE_LIMIT 0xffff
 #define _IO_BASE ((void __iomem *)0xfe000000)
 
+#define IOMEM(x)        ((void __force __iomem *)(x))
+
 extern int remap_area_pages(unsigned long start, unsigned long phys_addr,
 				unsigned long end, unsigned long flags);
 
@@ -175,6 +177,18 @@ static inline void writel(u32 data, volatile void __iomem *addr)
 #define __raw_readw readw
 #define __raw_readl readl
 
+/*
+ * http://comments.gmane.org/gmane.linux.ports.arm.kernel/117626
+ */
+
+#define readb_relaxed __raw_readb
+#define readw_relaxed __raw_readw
+#define readl_relaxed __raw_readl
+
+#define writeb_relaxed __raw_writeb
+#define writew_relaxed __raw_writew
+#define writel_relaxed __raw_writel
+
 /*
  * Need an mtype somewhere in here, for cache type deals?
  * This is probably too long for an inline.