From: Pavel Kubelun <be.dissent@gmail.com>
Date: Mon, 2 Dec 2019 23:45:47 +0000 (+0100)
Subject: ipq806x: add missing core1 voltage tolerance
X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=191822b59f0e18fbe2e05a81be2586e33b040eb3;p=openwrt%2Fstaging%2Fxback.git

ipq806x: add missing core1 voltage tolerance

Voltage tolerance is accounted per core, not per cpu, so add
missing DT entry.

Tested-By: Marc Benoit <marcb62185@gmail.com> [19.07: R7800]
Signed-off-by: Pavel Kubelun <be.dissent@gmail.com>
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
(cherry picked from commit 77e7d6c20dc6d5e50600fb4d013f4b71341e4168)
---

diff --git a/target/linux/ipq806x/files-4.14/arch/arm/boot/dts/qcom-ipq8064.dtsi b/target/linux/ipq806x/files-4.14/arch/arm/boot/dts/qcom-ipq8064.dtsi
index 8387460d27..d850553000 100644
--- a/target/linux/ipq806x/files-4.14/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/target/linux/ipq806x/files-4.14/arch/arm/boot/dts/qcom-ipq8064.dtsi
@@ -50,6 +50,7 @@
 			clock-names = "cpu", "l2";
 			clock-latency = <100000>;
 			cpu-supply = <&smb208_s2b>;
+			voltage-tolerance = <5>;
 			cooling-min-state = <0>;
 			cooling-max-state = <10>;
 			#cooling-cells = <2>;