From: Christian Lamparter Date: Tue, 26 Feb 2019 15:22:27 +0000 (+0100) Subject: ipq40xx: fix pcie msi IRQ trigger level X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=18e942b6c4e51a5a717a121697a63f3f98d93b19;p=openwrt%2Fstaging%2Flynxis.git ipq40xx: fix pcie msi IRQ trigger level From: Niklas Cassel |The databook clearly states that the MSI IRQ (msi_ctrl_int) is a level |triggered interrupt. | |The msi_ctrl_int will be high for as long as any MSI status bit is set, |thus the IRQ type should be set to IRQ_TYPE_LEVEL_HIGH, causing the |IRQ handler to keep getting called, as long as any MSI status bit is set. |[...] |Not having the correct IRQ type defined will cause us to lose interrupts, |which in turn causes timeouts in the PCIe endpoint drivers. | |Signed-off-by: Niklas Cassel |Reviewed-by: Bjorn Andersson Signed-off-by: Christian Lamparter --- diff --git a/target/linux/ipq40xx/patches-4.14/087-ARM-dts-qcom-ipq4019-Fix-MSI-IRQ-type.patch b/target/linux/ipq40xx/patches-4.14/087-ARM-dts-qcom-ipq4019-Fix-MSI-IRQ-type.patch new file mode 100644 index 0000000000..44cc725052 --- /dev/null +++ b/target/linux/ipq40xx/patches-4.14/087-ARM-dts-qcom-ipq4019-Fix-MSI-IRQ-type.patch @@ -0,0 +1,32 @@ +From: Niklas Cassel +Subject: [PATCH] ARM: dts: qcom: ipq4019: Fix MSI IRQ type +Date: Thu, 24 Jan 2019 14:00:47 +0100 + +The databook clearly states that the MSI IRQ (msi_ctrl_int) is a level +triggered interrupt. + +The msi_ctrl_int will be high for as long as any MSI status bit is set, +thus the IRQ type should be set to IRQ_TYPE_LEVEL_HIGH, causing the +IRQ handler to keep getting called, as long as any MSI status bit is set. + +A git grep shows that ipq4019 is the only SoC using snps,dw-pcie that has +configured this IRQ incorrectly. + +Not having the correct IRQ type defined will cause us to lose interrupts, +which in turn causes timeouts in the PCIe endpoint drivers. + +Signed-off-by: Niklas Cassel +Reviewed-by: Bjorn Andersson +--- + +--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi ++++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi +@@ -400,7 +400,7 @@ + ranges = <0x81000000 0 0x40200000 0x40200000 0 0x00100000>, + <0x82000000 0 0x40300000 0x40300000 0 0x00d00000>; + +- interrupts = ; ++ interrupts = ; + interrupt-names = "msi"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0x7>; diff --git a/target/linux/ipq40xx/patches-4.19/084-ARM-dts-qcom-ipq4019-Fix-MSI-IRQ-type.patch b/target/linux/ipq40xx/patches-4.19/084-ARM-dts-qcom-ipq4019-Fix-MSI-IRQ-type.patch new file mode 100644 index 0000000000..7864ef7fdf --- /dev/null +++ b/target/linux/ipq40xx/patches-4.19/084-ARM-dts-qcom-ipq4019-Fix-MSI-IRQ-type.patch @@ -0,0 +1,32 @@ +From: Niklas Cassel +Subject: [PATCH] ARM: dts: qcom: ipq4019: Fix MSI IRQ type +Date: Thu, 24 Jan 2019 14:00:47 +0100 + +The databook clearly states that the MSI IRQ (msi_ctrl_int) is a level +triggered interrupt. + +The msi_ctrl_int will be high for as long as any MSI status bit is set, +thus the IRQ type should be set to IRQ_TYPE_LEVEL_HIGH, causing the +IRQ handler to keep getting called, as long as any MSI status bit is set. + +A git grep shows that ipq4019 is the only SoC using snps,dw-pcie that has +configured this IRQ incorrectly. + +Not having the correct IRQ type defined will cause us to lose interrupts, +which in turn causes timeouts in the PCIe endpoint drivers. + +Signed-off-by: Niklas Cassel +Reviewed-by: Bjorn Andersson +--- + +--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi ++++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi +@@ -404,7 +404,7 @@ + ranges = <0x81000000 0 0x40200000 0x40200000 0 0x00100000>, + <0x82000000 0 0x40300000 0x40300000 0 0x00d00000>; + +- interrupts = ; ++ interrupts = ; + interrupt-names = "msi"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0x7>;