From: Mathew McBride Date: Thu, 10 Aug 2023 02:05:43 +0000 (+0000) Subject: armsr: armv8: synchronize PCIE related options with arm64 defconfig X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=15d3536c9deb2927c9a39350c6fa2e59f859df2a;p=openwrt%2Fstaging%2Fansuel.git armsr: armv8: synchronize PCIE related options with arm64 defconfig This turns on various PCI related options which are enabled in the Linux kernel arch/arm64/configs/defconfig but not yet in the OpenWrt config. Signed-off-by: Mathew McBride --- diff --git a/target/linux/armsr/armv8/config-6.1 b/target/linux/armsr/armv8/config-6.1 index e0931f2f06..b1774dd220 100644 --- a/target/linux/armsr/armv8/config-6.1 +++ b/target/linux/armsr/armv8/config-6.1 @@ -1,4 +1,5 @@ CONFIG_64BIT=y +CONFIG_ACPI_APEI=y CONFIG_ACPI_HMAT=y CONFIG_ACPI_PCC=y CONFIG_AHCI_IMX=y @@ -323,6 +324,12 @@ CONFIG_HISILICON_ERRATUM_161600802=y CONFIG_HISILICON_LPC=y CONFIG_HISI_PMU=y CONFIG_HISI_THERMAL=y +CONFIG_HOTPLUG_PCI=y +CONFIG_HOTPLUG_PCI_ACPI=y +# CONFIG_HOTPLUG_PCI_ACPI_IBM is not set +# CONFIG_HOTPLUG_PCI_CPCI is not set +# CONFIG_HOTPLUG_PCI_PCIE is not set +# CONFIG_HOTPLUG_PCI_SHPC is not set CONFIG_HW_RANDOM=y CONFIG_HW_RANDOM_ARM_SMCCC_TRNG=y # CONFIG_HW_RANDOM_HISI is not set @@ -460,6 +467,14 @@ CONFIG_NVMEM_ROCKCHIP_EFUSE=y # CONFIG_NVMEM_SUNXI_SID is not set # CONFIG_NVMEM_ZYNQMP is not set CONFIG_PCC=y +CONFIG_PCIEAER=y +CONFIG_PCIEASPM=y +CONFIG_PCIEASPM_DEFAULT=y +# CONFIG_PCIEASPM_PERFORMANCE is not set +# CONFIG_PCIEASPM_POWERSAVE is not set +# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set +CONFIG_PCIEPORTBUS=y +CONFIG_PCIE_ARMADA_8K=y CONFIG_PCIE_BRCMSTB=y CONFIG_PCIE_HISI_STB=y CONFIG_PCIE_IPROC_MSI=y @@ -474,8 +489,13 @@ CONFIG_PCIE_ROCKCHIP_HOST=y CONFIG_PCIE_XILINX_CPM=y CONFIG_PCIE_XILINX_NWL=y CONFIG_PCI_AARDVARK=y +CONFIG_PCI_HISI=y +CONFIG_PCI_HOST_THUNDER_ECAM=y +CONFIG_PCI_HOST_THUNDER_PEM=y CONFIG_PCI_IMX6=y +CONFIG_PCI_IOV=y CONFIG_PCI_LAYERSCAPE=y +CONFIG_PCI_PASID=y # CONFIG_PCI_RCAR_GEN2 is not set CONFIG_PHY_BCM_SR_PCIE=y CONFIG_PHY_BCM_SR_USB=y