From: Ansuel Smith Date: Thu, 30 Jan 2020 01:48:59 +0000 (+0100) Subject: ipq806x: use mdio dedicated driver X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=0d8098548ecb6d4712978c56e6aa1b27be3df779;p=openwrt%2Fstaging%2Fluka.git ipq806x: use mdio dedicated driver Enable kernel config flag Convert all dts to use the new mdio driver Signed-off-by: Ansuel Smith --- diff --git a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-ap148.dts b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-ap148.dts index ec4535b55f..cf39355897 100644 --- a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-ap148.dts +++ b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-ap148.dts @@ -29,12 +29,17 @@ }; soc { - mdio0: mdio { - compatible = "virtual,mdio-gpio"; + mdio0: mdio@37000000 { #address-cells = <1>; #size-cells = <0>; - gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>, - <&qcom_pinmux 0 GPIO_ACTIVE_HIGH>; + + compatible = "qcom,ipq8064-mdio", "syscon"; + reg = <0x37000000 0x200000>; + resets = <&gcc GMAC_CORE1_RESET>; + reset-names = "stmmaceth"; + clocks = <&gcc GMAC_CORE1_CLK>; + clock-names = "stmmaceth"; + pinctrl-0 = <&mdio0_pins>; pinctrl-names = "default"; @@ -94,7 +99,7 @@ mdio0_pins: mdio0_pins { mux { pins = "gpio0", "gpio1"; - function = "gpio"; + function = "mdio"; drive-strength = <8>; bias-disable; }; diff --git a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-ap161.dts b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-ap161.dts index 5b181075c7..32b32db271 100644 --- a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-ap161.dts +++ b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-ap161.dts @@ -73,7 +73,7 @@ mdio0_pins: mdio0_pins { mux { pins = "gpio0", "gpio1"; - function = "gpio"; + function = "mdio"; drive-strength = <8>; bias-disable; }; @@ -184,11 +184,17 @@ }; }; - mdio0: mdio { - compatible = "virtual,mdio-gpio"; + mdio0: mdio@37000000 { #address-cells = <1>; #size-cells = <0>; - gpios = <&qcom_pinmux 1 0 &qcom_pinmux 0 0>; + + compatible = "qcom,ipq8064-mdio", "syscon"; + reg = <0x37000000 0x200000>; + resets = <&gcc GMAC_CORE1_RESET>; + reset-names = "stmmaceth"; + clocks = <&gcc GMAC_CORE1_CLK>; + clock-names = "stmmaceth"; + pinctrl-0 = <&mdio0_pins>; pinctrl-names = "default"; diff --git a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-c2600.dts b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-c2600.dts index 0c3d8192b4..3a7b830daa 100644 --- a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-c2600.dts +++ b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-c2600.dts @@ -94,7 +94,7 @@ mdio0_pins: mdio0_pins { mux { pins = "gpio0", "gpio1"; - function = "gpio"; + function = "mdio"; drive-strength = <8>; bias-disable; }; @@ -338,12 +338,17 @@ force_gen1 = <1>; }; - mdio0: mdio { - compatible = "virtual,mdio-gpio"; + mdio0: mdio@37000000 { #address-cells = <1>; #size-cells = <0>; - gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>, - <&qcom_pinmux 0 GPIO_ACTIVE_HIGH>; + + compatible = "qcom,ipq8064-mdio", "syscon"; + reg = <0x37000000 0x200000>; + resets = <&gcc GMAC_CORE1_RESET>; + reset-names = "stmmaceth"; + clocks = <&gcc GMAC_CORE1_CLK>; + clock-names = "stmmaceth"; + pinctrl-0 = <&mdio0_pins>; pinctrl-names = "default"; diff --git a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-d7800.dts b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-d7800.dts index c3d8fab652..b266670dab 100644 --- a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-d7800.dts +++ b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-d7800.dts @@ -69,7 +69,7 @@ mdio0_pins: mdio0_pins { mux { pins = "gpio0", "gpio1"; - function = "gpio"; + function = "mdio"; drive-strength = <8>; bias-disable; }; @@ -261,12 +261,17 @@ }; }; - mdio0: mdio { - compatible = "virtual,mdio-gpio"; + mdio0: mdio@37000000 { #address-cells = <1>; #size-cells = <0>; - gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>, - <&qcom_pinmux 0 GPIO_ACTIVE_HIGH>; + + compatible = "qcom,ipq8064-mdio", "syscon"; + reg = <0x37000000 0x200000>; + resets = <&gcc GMAC_CORE1_RESET>; + reset-names = "stmmaceth"; + clocks = <&gcc GMAC_CORE1_CLK>; + clock-names = "stmmaceth"; + pinctrl-0 = <&mdio0_pins>; pinctrl-names = "default"; diff --git a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-db149.dts b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-db149.dts index 9d14b65834..eb8de37708 100644 --- a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-db149.dts +++ b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-db149.dts @@ -43,7 +43,7 @@ mdio0_pins: mdio0_pins { mux { pins = "gpio0", "gpio1"; - function = "gpio"; + function = "mdio"; drive-strength = <8>; bias-disable; }; @@ -143,11 +143,16 @@ status = "okay"; }; - mdio0: mdio { - compatible = "virtual,mdio-gpio"; + mdio0: mdio@37000000 { #address-cells = <1>; #size-cells = <0>; - gpios = <&qcom_pinmux 1 0 &qcom_pinmux 0 0>; + + compatible = "qcom,ipq8064-mdio", "syscon"; + reg = <0x37000000 0x200000>; + resets = <&gcc GMAC_CORE1_RESET>; + reset-names = "stmmaceth"; + clocks = <&gcc GMAC_CORE1_CLK>; + clock-names = "stmmaceth"; pinctrl-0 = <&mdio0_pins>; pinctrl-names = "default"; diff --git a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts index 5cc4cf31d1..fd2f193b9e 100644 --- a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts +++ b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts @@ -69,7 +69,7 @@ mdio0_pins: mdio0_pins { mux { pins = "gpio0", "gpio1"; - function = "gpio"; + function = "mdio"; drive-strength = <8>; bias-disable; }; @@ -277,12 +277,17 @@ }; }; - mdio0: mdio { - compatible = "virtual,mdio-gpio"; + mdio0: mdio@37000000 { #address-cells = <1>; #size-cells = <0>; - gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>, - <&qcom_pinmux 0 GPIO_ACTIVE_HIGH>; + + compatible = "qcom,ipq8064-mdio", "syscon"; + reg = <0x37000000 0x200000>; + resets = <&gcc GMAC_CORE1_RESET>; + reset-names = "stmmaceth"; + clocks = <&gcc GMAC_CORE1_CLK>; + clock-names = "stmmaceth"; + pinctrl-0 = <&mdio0_pins>; pinctrl-names = "default"; diff --git a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-r7500.dts b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-r7500.dts index f0909d1a8f..6cd781d06e 100644 --- a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-r7500.dts +++ b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-r7500.dts @@ -70,7 +70,7 @@ mdio0_pins: mdio0_pins { mux { pins = "gpio0", "gpio1"; - function = "gpio"; + function = "mdio"; drive-strength = <8>; bias-disable; }; @@ -222,12 +222,17 @@ }; }; - mdio0: mdio { - compatible = "virtual,mdio-gpio"; + mdio0: mdio@37000000 { #address-cells = <1>; #size-cells = <0>; - gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>, - <&qcom_pinmux 0 GPIO_ACTIVE_HIGH>; + + compatible = "qcom,ipq8064-mdio", "syscon"; + reg = <0x37000000 0x200000>; + resets = <&gcc GMAC_CORE1_RESET>; + reset-names = "stmmaceth"; + clocks = <&gcc GMAC_CORE1_CLK>; + clock-names = "stmmaceth"; + pinctrl-0 = <&mdio0_pins>; pinctrl-names = "default"; diff --git a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts index da67e36c6b..283ececd76 100644 --- a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts +++ b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts @@ -74,7 +74,7 @@ mdio0_pins: mdio0_pins { mux { pins = "gpio0", "gpio1"; - function = "gpio"; + function = "mdio"; drive-strength = <8>; bias-disable; }; @@ -256,12 +256,17 @@ }; }; - mdio0: mdio { - compatible = "virtual,mdio-gpio"; + mdio0: mdio@37000000 { #address-cells = <1>; #size-cells = <0>; - gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>, - <&qcom_pinmux 0 GPIO_ACTIVE_HIGH>; + + compatible = "qcom,ipq8064-mdio", "syscon"; + reg = <0x37000000 0x200000>; + resets = <&gcc GMAC_CORE1_RESET>; + reset-names = "stmmaceth"; + clocks = <&gcc GMAC_CORE1_CLK>; + clock-names = "stmmaceth"; + pinctrl-0 = <&mdio0_pins>; pinctrl-names = "default"; diff --git a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts index afccef5fa2..ef31bf00b0 100644 --- a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts +++ b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts @@ -92,7 +92,7 @@ mdio0_pins: mdio0_pins { mux { pins = "gpio0", "gpio1"; - function = "gpio"; + function = "mdio"; drive-strength = <8>; bias-disable; }; @@ -250,12 +250,17 @@ force_gen1 = <1>; }; - mdio0: mdio { - compatible = "virtual,mdio-gpio"; + mdio0: mdio@37000000 { #address-cells = <1>; #size-cells = <0>; - gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>, - <&qcom_pinmux 0 GPIO_ACTIVE_HIGH>; + + compatible = "qcom,ipq8064-mdio", "syscon"; + reg = <0x37000000 0x200000>; + resets = <&gcc GMAC_CORE1_RESET>; + reset-names = "stmmaceth"; + clocks = <&gcc GMAC_CORE1_CLK>; + clock-names = "stmmaceth"; + pinctrl-0 = <&mdio0_pins>; pinctrl-names = "default"; diff --git a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-wg2600hp.dts b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-wg2600hp.dts index 6667b1f473..73b8b526c2 100644 --- a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-wg2600hp.dts +++ b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-wg2600hp.dts @@ -36,12 +36,17 @@ }; soc { - mdio0: mdio { - compatible = "virtual,mdio-gpio"; + mdio0: mdio@37000000 { #address-cells = <1>; #size-cells = <0>; - gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>, - <&qcom_pinmux 0 GPIO_ACTIVE_HIGH>; + + compatible = "qcom,ipq8064-mdio", "syscon"; + reg = <0x37000000 0x200000>; + resets = <&gcc GMAC_CORE1_RESET>; + reset-names = "stmmaceth"; + clocks = <&gcc GMAC_CORE1_CLK>; + clock-names = "stmmaceth"; + pinctrl-0 = <&mdio0_pins>; pinctrl-names = "default"; @@ -399,7 +404,7 @@ mdio0_pins: mdio0_pins { mux { pins = "gpio0", "gpio1"; - function = "gpio"; + function = "mdio"; drive-strength = <8>; bias-disable; }; diff --git a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-wpq864.dts b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-wpq864.dts index c409b2d659..a72395fb46 100644 --- a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-wpq864.dts +++ b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-wpq864.dts @@ -217,18 +217,20 @@ }; }; - mdio0: mdio { + mdio0: mdio@37000000 { #address-cells = <1>; #size-cells = <0>; - compatible = "virtual,mdio-gpio"; + compatible = "qcom,ipq8064-mdio", "syscon"; + reg = <0x37000000 0x200000>; + resets = <&gcc GMAC_CORE1_RESET>; + reset-names = "stmmaceth"; + clocks = <&gcc GMAC_CORE1_CLK>; + clock-names = "stmmaceth"; pinctrl-0 = <&mdio0_pins>; pinctrl-names = "default"; - gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>, - <&qcom_pinmux 0 GPIO_ACTIVE_HIGH>; - ethernet-phy@0 { reg = <0>; qca,ar8327-initvals = < @@ -531,7 +533,7 @@ mdio0_pins: mdio0_pins { mux { pins = "gpio0", "gpio1"; - function = "gpio"; + function = "mdio"; drive-strength = <8>; bias-disable; }; diff --git a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts index 21dfc9e9eb..401cd0c7f7 100644 --- a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts +++ b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts @@ -70,12 +70,17 @@ }; }; - mdio { - compatible = "virtual,mdio-gpio"; + mdio0: mdio@37000000 { #address-cells = <1>; #size-cells = <0>; - gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>, - <&qcom_pinmux 0 GPIO_ACTIVE_HIGH>; + + compatible = "qcom,ipq8064-mdio", "syscon"; + reg = <0x37000000 0x200000>; + resets = <&gcc GMAC_CORE1_RESET>; + reset-names = "stmmaceth"; + clocks = <&gcc GMAC_CORE1_CLK>; + clock-names = "stmmaceth"; + pinctrl-0 = <&mdio0_pins>; pinctrl-names = "default"; @@ -466,7 +471,7 @@ mdio0_pins: mdio0_pins { mux { pins = "gpio0", "gpio1"; - function = "gpio"; + function = "mdio"; drive-strength = <8>; bias-disable; }; diff --git a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts index acecf9d3fa..6532516425 100644 --- a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts +++ b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts @@ -70,7 +70,7 @@ mdio0_pins: mdio0_pins { mux { pins = "gpio0", "gpio1"; - function = "gpio"; + function = "mdio"; drive-strength = <8>; bias-disable; }; @@ -218,12 +218,17 @@ force_gen1 = <1>; }; - mdio0: mdio { - compatible = "virtual,mdio-gpio"; + mdio0: mdio@37000000 { #address-cells = <1>; #size-cells = <0>; - gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>, - <&qcom_pinmux 0 GPIO_ACTIVE_HIGH>; + + compatible = "qcom,ipq8064-mdio", "syscon"; + reg = <0x37000000 0x200000>; + resets = <&gcc GMAC_CORE1_RESET>; + reset-names = "stmmaceth"; + clocks = <&gcc GMAC_CORE1_CLK>; + clock-names = "stmmaceth"; + pinctrl-0 = <&mdio0_pins>; pinctrl-names = "default"; diff --git a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8065-r7800.dts b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8065-r7800.dts index 8dc3d04e9e..f345a33c2e 100644 --- a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8065-r7800.dts +++ b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8065-r7800.dts @@ -100,7 +100,7 @@ mdio0_pins: mdio0_pins { mux { pins = "gpio0", "gpio1"; - function = "gpio"; + function = "mdio"; drive-strength = <8>; bias-disable; }; @@ -351,16 +351,20 @@ }; }; - mdio0: mdio { - compatible = "virtual,mdio-gpio"; + mdio0: mdio@37000000 { #address-cells = <1>; #size-cells = <0>; - gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>, - <&qcom_pinmux 0 GPIO_ACTIVE_HIGH>; + + compatible = "qcom,ipq8064-mdio", "syscon"; + reg = <0x37000000 0x200000>; + resets = <&gcc GMAC_CORE1_RESET>; + reset-names = "stmmaceth"; + clocks = <&gcc GMAC_CORE1_CLK>; + clock-names = "stmmaceth"; + pinctrl-0 = <&mdio0_pins>; pinctrl-names = "default"; - phy0: ethernet-phy@0 { reg = <0>; qca,ar8327-initvals = <