From: Tianling Shen Date: Mon, 5 Aug 2024 08:22:47 +0000 (+0800) Subject: rockchip: add Radxa ROCK 5A support X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=0cfd254913ae54ed052dc9e37fb14cd9326d5a73;p=openwrt%2Fstaging%2Fwigyori.git rockchip: add Radxa ROCK 5A support Hardware -------- RockChip RK3588 ARM64 (8 cores) 4/8/16/32GB LPDDR4X RAM 1000 Base-T Status LED eMMC/SPI Connector Micro-SD Slot 2x USB 3.0 Port 2x USB 2.0 Port Headphone Jack M.2 E-Key USB PD/QC 5/9/12/15/20V Power Install -------- Uncompress the OpenWrt sysupgrade and write it to a micro SD card or internal eMMC using dd. Signed-off-by: Tianling Shen Link: https://github.com/openwrt/openwrt/pull/16149 Signed-off-by: Hauke Mehrtens --- diff --git a/target/linux/rockchip/image/armv8.mk b/target/linux/rockchip/image/armv8.mk index b4404761bd..2bf77f2522 100644 --- a/target/linux/rockchip/image/armv8.mk +++ b/target/linux/rockchip/image/armv8.mk @@ -132,6 +132,15 @@ define Device/radxa_rock-3a endef TARGET_DEVICES += radxa_rock-3a +define Device/radxa_rock-5a + DEVICE_VENDOR := Radxa + DEVICE_MODEL := ROCK 5A + SOC := rk3588s + UBOOT_DEVICE_NAME := rock5a-rk3588s + DEVICE_PACKAGES := kmod-hwmon-pwmfan +endef +TARGET_DEVICES += radxa_rock-5a + define Device/radxa_rock-pi-4a DEVICE_VENDOR := Radxa DEVICE_MODEL := ROCK Pi 4A diff --git a/target/linux/rockchip/patches-6.6/051-01-v6.8-arm64-dts-rockchip-add-USB3-host-to-rock-5a.patch b/target/linux/rockchip/patches-6.6/051-01-v6.8-arm64-dts-rockchip-add-USB3-host-to-rock-5a.patch new file mode 100644 index 0000000000..a9bf3986e2 --- /dev/null +++ b/target/linux/rockchip/patches-6.6/051-01-v6.8-arm64-dts-rockchip-add-USB3-host-to-rock-5a.patch @@ -0,0 +1,39 @@ +From 0773a4a199aabb60afe50f5a19a6772abf4ad0bf Mon Sep 17 00:00:00 2001 +From: Sebastian Reichel +Date: Mon, 6 Nov 2023 16:54:32 +0100 +Subject: [PATCH] arm64: dts: rockchip: add USB3 host to rock-5a + +Enable USB3 host controller for the Radxa ROCK 5 Model A. This adds +USB3 for the lower USB3 port (the one closer to the PCB). + +The upper USB3 port uses the RK3588 USB TypeC host controller, which +use a different PHY without upstream support. + +Signed-off-by: Sebastian Reichel +Link: https://lore.kernel.org/r/20231106155934.80838-2-sebastian.reichel@collabora.com +Signed-off-by: Heiko Stuebner +--- + arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts | 8 ++++++++ + 1 file changed, 8 insertions(+) + +--- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts +@@ -113,6 +113,10 @@ + }; + }; + ++&combphy2_psu { ++ status = "okay"; ++}; ++ + &cpu_b0 { + cpu-supply = <&vdd_cpu_big0_s0>; + }; +@@ -734,3 +738,7 @@ + &usb_host1_ohci { + status = "okay"; + }; ++ ++&usb_host2_xhci { ++ status = "okay"; ++}; diff --git a/target/linux/rockchip/patches-6.6/051-02-v6.10-arm64-dts-rockchip-add-upper-USB3-port-to-rock-5a.patch b/target/linux/rockchip/patches-6.6/051-02-v6.10-arm64-dts-rockchip-add-upper-USB3-port-to-rock-5a.patch new file mode 100644 index 0000000000..5c1ebb85ea --- /dev/null +++ b/target/linux/rockchip/patches-6.6/051-02-v6.10-arm64-dts-rockchip-add-upper-USB3-port-to-rock-5a.patch @@ -0,0 +1,56 @@ +From af7ec140ddc1815bc462109792d95bcad05cfbc4 Mon Sep 17 00:00:00 2001 +From: Sebastian Reichel +Date: Tue, 9 Apr 2024 00:50:36 +0200 +Subject: [PATCH] arm64: dts: rockchip: add upper USB3 port to rock-5a + +Enable full support (XHCI, EHCI, OHCI) for the upper USB3 port from +Radxa Rock 5 Model A. The lower one is already supported. + +Signed-off-by: Sebastian Reichel +Link: https://lore.kernel.org/r/20240408225109.128953-10-sebastian.reichel@collabora.com +Signed-off-by: Heiko Stuebner +--- + .../boot/dts/rockchip/rk3588s-rock-5a.dts | 18 ++++++++++++++++++ + 1 file changed, 18 insertions(+) + +--- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts +@@ -698,6 +698,14 @@ + }; + }; + ++&u2phy0 { ++ status = "okay"; ++}; ++ ++&u2phy0_otg { ++ status = "okay"; ++}; ++ + &u2phy2 { + status = "okay"; + }; +@@ -721,6 +729,11 @@ + status = "okay"; + }; + ++&usbdp_phy0 { ++ status = "okay"; ++ rockchip,dp-lane-mux = <2 3>; ++}; ++ + &usb_host0_ehci { + status = "okay"; + pinctrl-names = "default"; +@@ -731,6 +744,11 @@ + status = "okay"; + }; + ++&usb_host0_xhci { ++ dr_mode = "host"; ++ status = "okay"; ++}; ++ + &usb_host1_ehci { + status = "okay"; + }; diff --git a/target/linux/rockchip/patches-6.6/051-03-v6.11-arm64-dts-rockchip-add-but-disabled-SFC-node-for-Radxa.patch b/target/linux/rockchip/patches-6.6/051-03-v6.11-arm64-dts-rockchip-add-but-disabled-SFC-node-for-Radxa.patch new file mode 100644 index 0000000000..b71246f0ad --- /dev/null +++ b/target/linux/rockchip/patches-6.6/051-03-v6.11-arm64-dts-rockchip-add-but-disabled-SFC-node-for-Radxa.patch @@ -0,0 +1,45 @@ +From 00224650dd45e166ea6eb1593f5f064583963ccf Mon Sep 17 00:00:00 2001 +From: FUKAUMI Naoki +Date: Sun, 23 Jun 2024 11:33:28 +0900 +Subject: [PATCH] arm64: dts: rockchip: add (but disabled) SFC node for Radxa + ROCK 5A + +This commit adds SFC node for Radxa ROCK 5A. + +since sdhci and sfc on RK3588s share pins(i.e. exclusive), it cannot +be enabled both nodes at the same time. so status = "okay" is omitted +here. + +you may be able to enable sfc (and disable sdhci) by fdt overlay. + +SPI NOR flash chip may vary, so use safe(lowest) spi-max-frequency. + +Signed-off-by: FUKAUMI Naoki +Link: https://lore.kernel.org/r/20240623023329.1044-2-naoki@radxa.com +Signed-off-by: Heiko Stuebner +--- + arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts | 13 +++++++++++++ + 1 file changed, 13 insertions(+) + +--- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts +@@ -376,6 +376,19 @@ + status = "okay"; + }; + ++&sfc { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&fspim0_pins>; ++ ++ flash@0 { ++ compatible = "jedec,spi-nor"; ++ reg = <0>; ++ spi-max-frequency = <104000000>; ++ spi-rx-bus-width = <4>; ++ spi-tx-bus-width = <1>; ++ }; ++}; ++ + &spi2 { + status = "okay"; + assigned-clocks = <&cru CLK_SPI2>; diff --git a/target/linux/rockchip/patches-6.6/116-arm64-dts-rockchip-Update-LED-properties-for-Radxa-Ro.patch b/target/linux/rockchip/patches-6.6/116-arm64-dts-rockchip-Update-LED-properties-for-Radxa-Ro.patch new file mode 100644 index 0000000000..7a5ebb8775 --- /dev/null +++ b/target/linux/rockchip/patches-6.6/116-arm64-dts-rockchip-Update-LED-properties-for-Radxa-Ro.patch @@ -0,0 +1,44 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Tianling Shen +Date: Mon Aug 05 16:14:33 2024 +0800 +Subject: [PATCH] arm64: dts: rockchip: Update LED properties for Radxa + Rock 5A + +Add OpenWrt's LED aliases for showing system status. + +Signed-off-by: Tianling Shen +--- + +--- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts +@@ -9,11 +9,16 @@ + + / { + model = "Radxa ROCK 5A"; +- compatible = "radxa,rock-5a", "rockchip,rk3588s"; ++ compatible = "radxa,rock-5a", "rockchip,rk3588"; + + aliases { + mmc0 = &sdhci; + mmc1 = &sdmmc; ++ ++ led-boot = &status_led; ++ led-failsafe = &status_led; ++ led-running = &status_led; ++ led-upgrade = &status_led; + }; + + analog-sound { +@@ -39,11 +44,10 @@ + pinctrl-names = "default"; + pinctrl-0 = <&io_led>; + +- io-led { ++ status_led: io-led { + color = ; + function = LED_FUNCTION_STATUS; + gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; +- linux,default-trigger = "heartbeat"; + }; + }; + diff --git a/target/linux/rockchip/patches-6.6/117-arm64-dts-rockchip-lower-mmc-speed-for-Radxa-Rock-5A.patch b/target/linux/rockchip/patches-6.6/117-arm64-dts-rockchip-lower-mmc-speed-for-Radxa-Rock-5A.patch new file mode 100644 index 0000000000..46d56d850d --- /dev/null +++ b/target/linux/rockchip/patches-6.6/117-arm64-dts-rockchip-lower-mmc-speed-for-Radxa-Rock-5A.patch @@ -0,0 +1,26 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Tianling Shen +Date: Mon Aug 05 16:14:33 2024 +0800 +Subject: [PATCH] arm64: dts: rockchip: lower mmc speed for Radxa Rock 5A + +The previously stated speed of sdr-104 in is too high for the hardware +to reliably communicate with some fast SD cards. +Rockchip boards have a common bug when operating uhs speed, which will +hang the system during a soft reboot. + +To be on the safe side, lower the speed to workaround. + +Signed-off-by: Tianling Shen +--- + +--- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts +@@ -374,7 +374,7 @@ + max-frequency = <150000000>; + no-sdio; + no-mmc; +- sd-uhs-sdr104; ++ sd-uhs-sdr50; + vmmc-supply = <&vcc_3v3_s0>; + vqmmc-supply = <&vccio_sd_s0>; + status = "okay";