From: H Hartley Sweeten <hsweeten@visionengravers.com>
Date: Mon, 17 Aug 2015 23:58:13 +0000 (-0700)
Subject: staging: comedi: s526: define the watchdog timer control register and bits
X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=088c1ce04dacc3374335ce8b23666a9f8aa5d85c;p=openwrt%2Fstaging%2Fblogic.git

staging: comedi: s526: define the watchdog timer control register and bits

Define this register and it's bits so that we can possibly support
it.

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---

diff --git a/drivers/staging/comedi/drivers/s526.c b/drivers/staging/comedi/drivers/s526.c
index e329c0470492..df463a22fa7e 100644
--- a/drivers/staging/comedi/drivers/s526.c
+++ b/drivers/staging/comedi/drivers/s526.c
@@ -52,7 +52,10 @@
 #define S526_TIMER_MANUAL	S526_TIMER_MODE(0)
 #define S526_TIMER_AUTO		S526_TIMER_MODE(1)
 #define S526_TIMER_RESTART	BIT(0)
-#define REG_WDC 0x02
+#define S526_WDOG_REG		0x02
+#define S526_WDOG_INVERTED	BIT(4)
+#define S526_WDOG_ENA		BIT(3)
+#define S526_WDOG_INTERVAL(x)	(((x) & 0x7) << 0)
 #define REG_DAC 0x04
 #define REG_ADC 0x06
 #define REG_ADD 0x08