From: Huang Rui <ray.huang@amd.com>
Date: Wed, 24 Jul 2019 18:39:36 +0000 (-0500)
Subject: drm/amdgpu: add soc15 common ip block support for renoir
X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=080deab66d4f766ce83cb8348070ac14fba92302;p=openwrt%2Fstaging%2Fblogic.git

drm/amdgpu: add soc15 common ip block support for renoir

This patch adds common ip support for renoir.

Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---

diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
index ece2559df537..043b7a452555 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -637,6 +637,7 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev)
 	case CHIP_VEGA10:
 	case CHIP_VEGA12:
 	case CHIP_RAVEN:
+	case CHIP_RENOIR:
 		vega10_reg_base_init(adev);
 		break;
 	case CHIP_VEGA20:
@@ -1133,6 +1134,11 @@ static int soc15_common_early_init(void *handle)
 		adev->pg_flags = 0;
 		adev->external_rev_id = adev->rev_id + 0x32;
 		break;
+	case CHIP_RENOIR:
+		adev->cg_flags = 0;
+		adev->pg_flags = 0;
+		adev->external_rev_id = adev->rev_id + 0x91;
+		break;
 	default:
 		/* FIXME: not supported yet */
 		return -EINVAL;