From: Christian Marangi Date: Fri, 10 Jan 2025 13:15:31 +0000 (+0100) Subject: airoha: an7581: replace BUS clock patch with upstream version X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=07b49ce87660a0448c0535b481b330e1bd333a8c;p=openwrt%2Fstaging%2Fblocktrron.git airoha: an7581: replace BUS clock patch with upstream version Replace BUS clock patch with upstream version with related tag as it got approved and merged. Signed-off-by: Christian Marangi --- diff --git a/target/linux/airoha/patches-6.6/035-v6.13-clk-en7523-Fix-wrong-BUS-clock-for-EN7581.patch b/target/linux/airoha/patches-6.6/035-v6.13-clk-en7523-Fix-wrong-BUS-clock-for-EN7581.patch new file mode 100644 index 0000000000..89b970f8bb --- /dev/null +++ b/target/linux/airoha/patches-6.6/035-v6.13-clk-en7523-Fix-wrong-BUS-clock-for-EN7581.patch @@ -0,0 +1,48 @@ +From 2eb75f86d52565367211c51334d15fe672633085 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Sat, 16 Nov 2024 11:56:53 +0100 +Subject: [PATCH] clk: en7523: Fix wrong BUS clock for EN7581 + +The Documentation for EN7581 had a typo and still referenced the EN7523 +BUS base source frequency. This was in conflict with a different page in +the Documentration that state that the BUS runs at 300MHz (600MHz source +with divisor set to 2) and the actual watchdog that tick at half the BUS +clock (150MHz). This was verified with the watchdog by timing the +seconds that the system takes to reboot (due too watchdog) and by +operating on different values of the BUS divisor. + +The correct values for source of BUS clock are 600MHz and 540MHz. + +This was also confirmed by Airoha. + +Cc: stable@vger.kernel.org +Fixes: 66bc47326ce2 ("clk: en7523: Add EN7581 support") +Signed-off-by: Christian Marangi +Link: https://lore.kernel.org/r/20241116105710.19748-1-ansuelsmth@gmail.com +Acked-by: Lorenzo Bianconi +Signed-off-by: Stephen Boyd +--- + drivers/clk/clk-en7523.c | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +--- a/drivers/clk/clk-en7523.c ++++ b/drivers/clk/clk-en7523.c +@@ -87,6 +87,7 @@ static const u32 slic_base[] = { 1000000 + static const u32 npu_base[] = { 333000000, 400000000, 500000000 }; + /* EN7581 */ + static const u32 emi7581_base[] = { 540000000, 480000000, 400000000, 300000000 }; ++static const u32 bus7581_base[] = { 600000000, 540000000 }; + static const u32 npu7581_base[] = { 800000000, 750000000, 720000000, 600000000 }; + static const u32 crypto_base[] = { 540000000, 480000000 }; + +@@ -222,8 +223,8 @@ static const struct en_clk_desc en7581_b + .base_reg = REG_BUS_CLK_DIV_SEL, + .base_bits = 1, + .base_shift = 8, +- .base_values = bus_base, +- .n_base_values = ARRAY_SIZE(bus_base), ++ .base_values = bus7581_base, ++ .n_base_values = ARRAY_SIZE(bus7581_base), + + .div_bits = 3, + .div_shift = 0, diff --git a/target/linux/airoha/patches-6.6/109-clk-en7523-Fix-wrong-BUS-clock-for-EN7581.patch b/target/linux/airoha/patches-6.6/109-clk-en7523-Fix-wrong-BUS-clock-for-EN7581.patch deleted file mode 100644 index 01a5fd0c87..0000000000 --- a/target/linux/airoha/patches-6.6/109-clk-en7523-Fix-wrong-BUS-clock-for-EN7581.patch +++ /dev/null @@ -1,45 +0,0 @@ -From 6d74b9e6d3bb07f50b22b9ea047b84a83aba185c Mon Sep 17 00:00:00 2001 -From: Christian Marangi -Date: Thu, 17 Oct 2024 19:26:24 +0200 -Subject: [PATCH] clk: en7523: Fix wrong BUS clock for EN7581 - -The Documentation for EN7581 had a typo and still referenced the EN7523 -BUS base source frequency. This was in conflict with a different page in -the Documentration that state that the BUS runs at 300MHz (600MHz source with -divisor set to 2) and the actual watchdog that tick at half the BUS -clock (150MHz). This was verified with the watchdog by timing the -seconds that the system takes to reboot (due too watchdog) and by -operating on different values of the BUS divisor. - -The correct values for source of BUS clock are 600MHz and 540MHz. - -This was also confirmed by Airoha. - -Cc: stable@vger.kernel.org -Fixes: 66bc47326ce2 ("clk: en7523: Add EN7581 support") -Signed-off-by: Christian Marangi ---- - drivers/clk/clk-en7523.c | 5 +++-- - 1 file changed, 3 insertions(+), 2 deletions(-) - ---- a/drivers/clk/clk-en7523.c -+++ b/drivers/clk/clk-en7523.c -@@ -87,6 +87,7 @@ static const u32 slic_base[] = { 1000000 - static const u32 npu_base[] = { 333000000, 400000000, 500000000 }; - /* EN7581 */ - static const u32 emi7581_base[] = { 540000000, 480000000, 400000000, 300000000 }; -+static const u32 bus7581_base[] = { 600000000, 540000000 }; - static const u32 npu7581_base[] = { 800000000, 750000000, 720000000, 600000000 }; - static const u32 crypto_base[] = { 540000000, 480000000 }; - -@@ -222,8 +223,8 @@ static const struct en_clk_desc en7581_b - .base_reg = REG_BUS_CLK_DIV_SEL, - .base_bits = 1, - .base_shift = 8, -- .base_values = bus_base, -- .n_base_values = ARRAY_SIZE(bus_base), -+ .base_values = bus7581_base, -+ .n_base_values = ARRAY_SIZE(bus7581_base), - - .div_bits = 3, - .div_shift = 0,