From: Felix Fietkau Date: Thu, 11 Feb 2016 15:01:54 +0000 (+0000) Subject: ag71xx: increase tx ring size to improve performance X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=033fbb7778aecfd575e7c773b102acecf0d99240;p=openwrt%2Fstaging%2Fstintel.git ag71xx: increase tx ring size to improve performance Signed-off-by: Felix Fietkau SVN-Revision: 48692 --- diff --git a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h index b18c20b6dd..3397ca828b 100644 --- a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h +++ b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h @@ -55,10 +55,10 @@ #define AG71XX_TX_RING_SPLIT 512 #define AG71XX_TX_RING_DS_PER_PKT DIV_ROUND_UP(AG71XX_TX_MTU_LEN, \ AG71XX_TX_RING_SPLIT) -#define AG71XX_TX_RING_SIZE_DEFAULT 48 +#define AG71XX_TX_RING_SIZE_DEFAULT 128 #define AG71XX_RX_RING_SIZE_DEFAULT 128 -#define AG71XX_TX_RING_SIZE_MAX 48 +#define AG71XX_TX_RING_SIZE_MAX 128 #define AG71XX_RX_RING_SIZE_MAX 128 #ifdef CONFIG_AG71XX_DEBUG