From: Maxim Anisimov Date: Sun, 10 Dec 2023 15:40:39 +0000 (+0100) Subject: ramips: dts: mt7628an: reset FE and ESW cores together X-Git-Tag: v23.05.3~120 X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=0128d860a0724514256e1a31e24f0515a7b7bd0e;p=openwrt%2Fopenwrt.git ramips: dts: mt7628an: reset FE and ESW cores together Failing to do so will cause the DMA engine to not initialize properly and fail to forward packets between them, and in some cases will cause spurious transmission with size exceeding allowed packet size, causing a kernel panic. Fixes: 60fadae62b64 ("ramips: ethernet: ralink: move reset of the esw into the esw instead of fe") Signed-off-by: Maxim Anisimov [Provide commit description, split into logical changes] Signed-off-by: Lech Perczak (cherry picked from commit f87b66507e9245e6e02dbc76e2e7b27c9e0bf364) Signed-off-by: Lech Perczak --- diff --git a/target/linux/ramips/dts/mt7628an.dtsi b/target/linux/ramips/dts/mt7628an.dtsi index 8ef73dce80..788e24714f 100644 --- a/target/linux/ramips/dts/mt7628an.dtsi +++ b/target/linux/ramips/dts/mt7628an.dtsi @@ -429,8 +429,8 @@ interrupt-parent = <&cpuintc>; interrupts = <5>; - resets = <&rstctrl 21>; - reset-names = "fe"; + resets = <&rstctrl 21>, <&rstctrl 23>; + reset-names = "fe", "esw"; mediatek,switch = <&esw>; }; @@ -439,8 +439,8 @@ compatible = "mediatek,mt7628-esw", "ralink,rt3050-esw"; reg = <0x10110000 0x8000>; - resets = <&rstctrl 23 &rstctrl 24>; - reset-names = "esw", "ephy"; + resets = <&rstctrl 24>; + reset-names = "ephy"; interrupt-parent = <&intc>; interrupts = <17>;