ipq806x: fix non working switch for eax500 devices fix-eax500
authorChristian Marangi <ansuelsmth@gmail.com>
Fri, 11 Nov 2022 18:54:38 +0000 (19:54 +0100)
committerChristian Marangi <ansuelsmth@gmail.com>
Fri, 11 Nov 2022 19:08:50 +0000 (20:08 +0100)
It seems on Linksys EA7500/EA8500 devices gpio63 that in reference board
is used for reset of pcie2, is repurposed as swtich reset.

On old kernel it was used an hack to set it low at boot time and enable
pcie2 to make the switch work. In new kernel it seems pcie code changed
and now the pcie line is helf in reset if nothing is connected.

Try to address this correctly by removing the gpio from pcie2 reset and
correctly set it as switch reset.

This is based on an old commit and all the info based here [0]

[0] https://github.com/openwrt/openwrt/pull/2047

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-eax500.dtsi

index adf5192ac8cc0b3ce279f0e108cb5f4dde0f4630..b69133e6d4365b9c4bdcaee10ddcbe4840f6e6d9 100644 (file)
        };
 };
 
+&qcom_pinmux {
+       switch_reset: switch_reset_pins {
+               mux {
+                       pins = "gpio63";
+                       function = "gpio";
+                       drive-strength = <12>;
+                       bias-pull-up;
+               };
+       };
+};
+
 &hs_phy_0 {
        status = "okay";
 };
        status = "okay";
 };
 
+/delete-node/ &pcie2_pins;
+
 &pcie2 {
-       status = "okay";
+       /delete-property/ pinctrl-0;
+       /delete-property/ pinctrl-names;
+       /delete-property/ perst-gpio;
 };
 
 &nand {
        pinctrl-0 = <&mdio0_pins>;
        pinctrl-names = "default";
 
+       reset-gpios = <&qcom_pinmux 63 GPIO_ACTIVE_LOW>;
+       reset-duration = <10>;
+
        phy0: ethernet-phy@0 {
                reg = <0>;
                qca,ar8327-initvals = <