--- /dev/null
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * IPQ6018 CP01 board device tree source
+ *
+ * Copyright (c) 2019-2021 The Linux Foundation. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "ipq6018.dtsi"
+#include "ipq6018-cp-cpu.dtsi"
+#include "ipq6018-ess.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+
+/ {
+ model = "Edgecore EAP101";
+ compatible = "edgecore,eap101", "qcom,ipq6018-cp01", "qcom,ipq6018";
+
+ aliases {
+ ethernet0 = &dp5;
+ ethernet1 = &dp2;
+ ethernet2 = &dp3;
+ led-boot = &led_power;
+ led-failsafe = &led_power;
+ led-running = &led_power;
+ led-upgrade = &led_power;
+ serial0 = &blsp1_uart3;
+ serial1 = &blsp1_uart2;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ bootargs-append = " root=/dev/ubiblock0_1 swiotlb=1";
+ };
+
+ keys {
+ compatible = "gpio-keys";
+ pinctrl-0 = <&button_pins>;
+ pinctrl-names = "default";
+
+ reset {
+ label = "reset";
+ gpios = <&tlmm 19 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_RESTART>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-0 = <&leds_pins>;
+ pinctrl-names = "default";
+
+ led@25 {
+ label = "green:wifi5";
+ gpios = <&tlmm 35 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "wf188:green:5g";
+ default-state = "off";
+ };
+ led@24 {
+ label = "green:wifi2";
+ gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "wf188:green:2g";
+ default-state = "off";
+ };
+ led_power: led@16 {
+ label = "green:led_pwr";
+ gpios = <&tlmm 74 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "green:power";
+ default-state = "off";
+ };
+ led@61 {
+ label = "green:lan1";
+ gpios = <&tlmm 61 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "green:power";
+ default-state = "off";
+ };
+ led@62 {
+ label = "green:wan";
+ gpios = <&tlmm 62 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "green:power";
+ default-state = "off";
+ };
+ led@63 {
+ label = "green:lan2";
+ gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "green:power";
+ default-state = "off";
+ };
+ };
+};
+
+&blsp1_uart3 {
+ pinctrl-0 = <&serial_3_pins>;
+ pinctrl-names = "default";
+ status = "ok";
+};
+
+&blsp1_spi1 {
+ pinctrl-0 = <&spi_0_pins>;
+ pinctrl-names = "default";
+ cs-select = <0>;
+ status = "ok";
+
+ m25p80@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0>;
+ compatible = "mx25u25635f", "jedec,spi-nor";
+ spi-max-frequency = <50000000>;
+ use-default-sizes;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "SBL1";
+ reg = <0x0 0xc0000>;
+ read-only;
+ };
+
+ partition@c0000 {
+ label = "MIBIB";
+ reg = <0xc0000 0x10000>;
+ read-only;
+ };
+
+ partition@d0000 {
+ label = "BOOTCONFIG";
+ reg = <0xd0000 0x20000>;
+ read-only;
+ };
+
+ partition@f0000 {
+ label = "BOOTCONFIG1";
+ reg = <0xf0000 0x20000>;
+ read-only;
+ };
+
+ partition@110000 {
+ label = "QSEE";
+ reg = <0x110000 0x1a0000>;
+ read-only;
+ };
+
+ partition@2b0000 {
+ label = "QSEE_1";
+ reg = <0x2b0000 0x1a0000>;
+ read-only;
+ };
+
+ partition@450000 {
+ label = "DEVCFG";
+ reg = <0x450000 0x10000>;
+ read-only;
+ };
+
+ partition@460000 {
+ label = "DEVCFG_1";
+ reg = <0x460000 0x10000>;
+ read-only;
+ };
+
+ partition@470000 {
+ label = "RPM";
+ reg = <0x470000 0x40000>;
+ read-only;
+ };
+
+ partition@4b0000 {
+ label = "RPM_1";
+ reg = <0x4b0000 0x40000>;
+ read-only;
+ };
+
+ partition@4f0000 {
+ label = "CDT";
+ reg = <0x4f0000 0x10000>;
+ read-only;
+ };
+
+ partition@500000 {
+ label = "CDT_1";
+ reg = <0x500000 0x10000>;
+ read-only;
+ };
+
+ partition@510000 {
+ label = "0:APPSBLENV";
+ reg = <0x510000 0x10000>;
+ };
+
+ partition@520000 {
+ label = "APPSBL";
+ reg = <0x520000 0xa0000>;
+ read-only;
+ };
+
+ partition@5c0000 {
+ label = "APPSBL_1";
+ reg = <0x5c0000 0xa0000>;
+ read-only;
+ };
+
+ partition@660000 {
+ label = "0:ART";
+ reg = <0x660000 0x40000>;
+ read-only;
+ };
+
+ partition@6a0000 {
+ label = "Product_Info";
+ reg = <0x6a0000 0x80000>;
+ read-only;
+ };
+
+ partition@720000 {
+ label = "priv_data1";
+ reg = <0x720000 0x10000>;
+ read-only;
+ };
+
+ partition@730000 {
+ label = "priv_data2";
+ reg = <0x730000 0x10000>;
+ read-only;
+ };
+ };
+ };
+
+ slb9670@1{
+ compatible = "infineon,slb9670";
+ reg = <1>; /* CE1 */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ spi-max-frequency = <40000000>;
+ status = "okay";
+ };
+};
+
+&blsp1_uart2 {
+ pinctrl-0 = <&hsuart_pins &btcoex_pins>;
+ pinctrl-names = "default";
+ dmas = <&blsp_dma 2>,
+ <&blsp_dma 3>;
+ dma-names = "tx", "rx";
+ status = "ok";
+};
+
+&dp5 {
+ status = "okay";
+ phy-handle = <&qca8081>;
+ phy-mode = "sgmii";
+ label = "wan";
+};
+
+&tlmm {
+ spi_0_pins: spi-0-pins {
+ pins = "gpio38", "gpio39", "gpio40", "gpio41";
+ function = "blsp0_spi";
+ drive-strength = <8>;
+ bias-pull-down;
+ };
+
+ spi_1_pins: spi_1_pins {
+ mux {
+ pins = "gpio69", "gpio71", "gpio72";
+ function = "blsp1_spi";
+ drive-strength = <8>;
+ bias-pull-down;
+ };
+ spi_cs {
+ pins = "gpio70";
+ function = "blsp1_spi";
+ drive-strength = <8>;
+ bias-disable;
+ };
+ quartz_interrupt {
+ pins = "gpio78";
+ function = "gpio";
+ input;
+ bias-disable;
+ };
+ quartz_reset {
+ pins = "gpio79";
+ function = "gpio";
+ output-low;
+ bias-disable;
+ };
+
+ };
+
+ sd_pins: sd-pinmux {
+ pins = "gpio62";
+ function = "sd_card";
+ drive-strength = <8>;
+ bias-pull-up;
+ };
+
+ button_pins: button_pins {
+ wps_button {
+ pins = "gpio19";
+ function = "gpio";
+ drive-strength = <8>;
+ bias-pull-up;
+ };
+ };
+
+ mdio_pins: mdio_pinmux {
+ mux_0 {
+ pins = "gpio64";
+ function = "mdc";
+ drive-strength = <8>;
+ bias-pull-up;
+ };
+ mux_1 {
+ pins = "gpio65";
+ function = "mdio";
+ drive-strength = <8>;
+ bias-pull-up;
+ };
+ mux_2 {
+ pins = "gpio75";
+ function = "gpio";
+ bias-pull-up;
+ };
+ mux_3 {
+ pins = "gpio77";
+ function = "gpio";
+ bias-pull-up;
+ };
+ };
+
+ pwm_pins: pwm_pinmux {
+ pins = "gpio18";
+ function = "pwm00";
+ drive-strength = <8>;
+ };
+
+ hsuart_pins: hsuart_pins {
+ mux {
+ pins = "gpio71", "gpio72", "gpio69", "gpio70";
+ function = "blsp1_uart";
+ drive-strength = <8>;
+ bias-disable;
+ };
+ };
+
+ leds_pins: leds_pins {
+ led_pwr {
+ pins = "gpio74";
+ function = "gpio";
+ drive-strength = <8>;
+ bias-pull-down;
+ };
+ led_5g {
+ pins = "gpio35";
+ function = "gpio";
+ drive-strength = <8>;
+ bias-pull-down;
+ };
+ led_2g {
+ pins = "gpio37";
+ function = "gpio";
+ drive-strength = <8>;
+ bias-pull-down;
+ };
+ };
+
+ btcoex_pins: btcoex_pins {
+ mux_0 {
+ pins = "gpio51";
+ function = "pta1_1";
+ drive-strength = <6>;
+ bias-pull-down;
+ };
+ mux_1 {
+ pins = "gpio53";
+ function = "pta1_0";
+ drive-strength = <6>;
+ bias-pull-down;
+ };
+ mux_2 {
+ pins = "gpio52";
+ function = "pta1_2";
+ drive-strength = <6>;
+ bias-pull-down;
+ };
+ };
+};
+
+&soc {
+ gpio_export {
+ compatible = "gpio-export";
+ #size-cells = <0>;
+
+ ble_reset {
+ gpio-export,name = "ble_reset";
+ gpio-export,output = <0>;
+ gpios = <&tlmm 79 GPIO_ACTIVE_HIGH>;
+ };
+
+ ble_backdoor {
+ gpio-export,name = "ble_backdoor";
+ gpio-export,output = <1>;
+ gpios = <&tlmm 34 GPIO_ACTIVE_HIGH>;
+ };
+ };
+};
+
+&edma {
+ status = "okay";
+};
+
+&mdio {
+ status = "okay";
+ pinctrl-0 = <&mdio_pins>;
+ pinctrl-names = "default";
+ reset-gpios = <&tlmm 75 GPIO_ACTIVE_HIGH>;
+ reset-delay-us = <10000>;
+ reset-post-delay-us = <50000>;
+
+ qca8081: ethernet-phy@28 {
+ compatible = "ethernet-phy-id004d.d101";
+ reg = <28>;
+ reset-gpios = <&tlmm 77 GPIO_ACTIVE_LOW>;
+ reset-assert-us = <10000>;
+ reset-deassert-us = <50000>;
+ };
+};
+
+&qpic_bam {
+ status = "ok";
+};
+
+&qpic_nand {
+ status = "ok";
+
+ nand@0 {
+ reg = <0>;
+
+ nand-ecc-strength = <8>;
+ nand-ecc-step-size = <512>;
+ nand-bus-width = <8>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "rootfs1";
+ reg = <0x00000000 0x03c00000>;
+ };
+
+ partition@3c00000 {
+ label = "rootfs2";
+ reg = <0x03c00000 0x03c00000>;
+ };
+ };
+ };
+};
+
+&pcie_phy {
+ status = "ok";
+};
+
+&pcie0 {
+ status = "ok";
+};
+
+&qusb_phy_1 {
+ status = "ok";
+};
+
+&usb2 {
+ status = "ok";
+};
+
+&qusb_phy_0 {
+ status = "ok";
+};
+
+&ssphy_0 {
+ status = "ok";
+};
+
+&switch {
+ status = "okay";
+
+ // switch_lan_bmp = <(ESS_PORT3|ESS_PORT4)>; /* lan port bitmap */
+ switch_wan_bmp = <ESS_PORT5>; /* wan port bitmap */
+ switch_mac_mode = <MAC_MODE_PSGMII>; /* mac mode for uniphy instance0*/
+ switch_mac_mode1 = <MAC_MODE_SGMII_CHANNEL0>;
+
+ qcom,port_phyinfo {
+ port@5 {
+ port_id = <5>;
+ phy_address = <28>;
+ port_mac_sel = "QGMAC_PORT";
+ };
+ };
+};
+
+&usb3 {
+ status = "ok";
+};
+
+&wifi {
+ status = "okay";
+ qcom,ath11k-calibration-variant = "edgecore-eap101";
+};
projects / openwrt / staging / stintel.git / commitdiff