drm/i915/gvt: Reduce rcs mocs switch latency

Use I915_WRITE_FW instead of I915_WRITE to reduce overhead.
The overall mmio switch latency lowers from ~600us to ~180us.

Signed-off-by: Changbin Du <changbin.du@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>

diff --git a/drivers/gpu/drm/i915/gvt/render.c b/drivers/gpu/drm/i915/gvt/render.c
index e16c3551b4a3eceaf1b9d8fd965796c1d208c75a..0672178548ef9087f6c145faa535ba30e940a733 100644 (file)
--- a/drivers/gpu/drm/i915/gvt/render.c
+++ b/drivers/gpu/drm/i915/gvt/render.c
@@ -209,7 +209,7 @@ static void load_mocs(struct intel_vgpu *vgpu, int ring_id)
        offset.reg = regs[ring_id];
        for (i = 0; i < 64; i++) {
                gen9_render_mocs[ring_id][i] = I915_READ_FW(offset);
-               I915_WRITE(offset, vgpu_vreg(vgpu, offset));
+               I915_WRITE_FW(offset, vgpu_vreg(vgpu, offset));
                offset.reg += 4;
        }