ARTICIAS_SYS_BUS,
ARTICIAS_SYS_PHYS,
ARTICIAS_SYS_MAXSIZE,
- PCI_REGION_MEM | PCI_REGION_MEMORY);
+ PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
/* PCI memory space */
pci_set_region(articiaS_hose.regions + 1,
CONFIG_PCI_SYS_MEM_BUS,
CONFIG_PCI_SYS_MEM_PHYS,
gd->ram_size,
- PCI_REGION_MEM | PCI_REGION_MEMORY);
+ PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
hose->region_count = 4;
pci_set_region (hose->regions + 0,
AP1000_SYS_MEM_START, AP1000_SYS_MEM_START,
AP1000_SYS_MEM_SIZE,
- PCI_REGION_MEM | PCI_REGION_MEMORY);
+ PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
/* PCI Memory space */
pci_set_region (hose->regions + 1,
/* System memory space */
pci_set_region (hose->regions + 0,
0x00000000, 0x40000000, 0x01000000,
- PCI_REGION_MEM | PCI_REGION_MEMORY);
+ PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
/* PCI Memory - config space */
pci_set_region (hose->regions + 1,
/* System memory space */
pci_set_region(hose->regions + 0,
0x00000000, 0x00000000, 0x01000000,
- PCI_REGION_MEM | PCI_REGION_MEMORY);
+ PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
/* PCI Memory space */
pci_set_region(hose->regions + 1,
* so we need (CONFIG_SYS_PCI_MEMORY_SIZE-1)
*/
CONFIG_SYS_PCI_MEMORY_SIZE-1,
- PCI_REGION_MEM | PCI_REGION_MEMORY);
+ PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
/* PCI memory space */
pci_set_region(hose->regions + 1,
CONFIG_SYS_PCI_MEMORY_BUS,
CONFIG_SYS_PCI_MEMORY_PHYS,
CONFIG_SYS_PCI_MEMORY_SIZE,
- PCI_REGION_MEM | PCI_REGION_MEMORY);
+ PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
/* PCI memory space */
pci_set_region(hose->regions + 1,
/* System memory space */
pci_set_region(hose->regions + 0,
0x00000000, 0x00000000, 0x01000000,
- PCI_REGION_MEM | PCI_REGION_MEMORY);
+ PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
/* PCI Memory space */
pci_set_region(hose->regions + 1,
CONFIG_SYS_PCI_SLV_MEM_LOCAL,
CONFIG_SYS_PCI_SLV_MEM_BUS,
CONFIG_SYS_PCI_SLV_MEM_SIZE,
- PCI_REGION_MEM | PCI_REGION_MEMORY);
+ PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
hose[0].region_count = 4;
pci_set_region(hose->regions + 3,
CONFIG_PCI_SYS_MEM_BUS,
CONFIG_PCI_SYS_MEM_PHYS,
- gd->ram_size, PCI_REGION_MEM | PCI_REGION_MEMORY);
+ gd->ram_size, PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
hose->region_count = 4;
pci_set_region(hose->regions + 3,
CONFIG_PCI_SYS_MEM_BUS,
CONFIG_PCI_SYS_MEM_PHYS,
- gd->ram_size, PCI_REGION_MEM | PCI_REGION_MEMORY);
+ gd->ram_size, PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
hose->region_count = 4;
CONFIG_SYS_PCI_SLV_MEM_LOCAL,
CONFIG_SYS_PCI_SLV_MEM_BUS,
CONFIG_SYS_PCI_SLV_MEM_SIZE,
- PCI_REGION_MEM | PCI_REGION_MEMORY);
+ PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
hose[0].region_count = 4;
PCI_MEMORY_BUS,
PCI_MEMORY_PHYS,
PCI_MEMORY_MAXSIZE,
- PCI_REGION_MEM | PCI_REGION_MEMORY);
+ PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
/* PCI memory space */
pci_set_region(local_hose.regions + 1,
PCI_MEMORY_BUS,
PCI_MEMORY_PHYS,
PCI_MEMORY_MAXSIZE,
- PCI_REGION_MEMORY);
+ PCI_REGION_SYS_MEMORY);
/* PCI memory space */
pci_set_region(cpci_hose.regions + 1,
CONFIG_SYS_PCI_MEMORY_BUS,
CONFIG_SYS_PCI_MEMORY_PHYS,
CONFIG_SYS_PCI_MEMORY_SIZE,
- PCI_REGION_MEM | PCI_REGION_MEMORY);
+ PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
/* PCI memory space */
pci_set_region(hose->regions + 1,
CONFIG_PCI_SYS_MEM_BUS,
CONFIG_PCI_SYS_MEM_PHYS,
gd->ram_size,
- PCI_REGION_MEM | PCI_REGION_MEMORY);
+ PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
hose->region_count = 4;
CONFIG_PCI_SYS_MEM_BUS,
CONFIG_PCI_SYS_MEM_PHYS,
gd->ram_size,
- PCI_REGION_MEM | PCI_REGION_MEMORY);
+ PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
hose->region_count = 4;
CONFIG_SYS_PCI_MEMORY_BUS,
CONFIG_SYS_PCI_MEMORY_PHYS,
CONFIG_SYS_PCI_MEMORY_SIZE,
- PCI_REGION_MEM | PCI_REGION_MEMORY);
+ PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
/* outbound memory */
pci_set_region(r++,
pci_set_region (hose->regions + 3,
0x00000000,
0x80000000,
- 0x04000000, PCI_REGION_MEM | PCI_REGION_MEMORY);
+ 0x04000000, PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
hose->region_count = 4;
CONFIG_PCI_SYS_MEM_BUS,
CONFIG_PCI_SYS_MEM_PHYS,
CONFIG_PCI_SYS_MEM_SIZE,
- PCI_REGION_MEM | PCI_REGION_MEMORY);
+ PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
hose->region_count = 3;
for (r = 0; r < hose->region_count; r++) {
u64 bus_start, phys_start, size;
- /* skip if !PCI_REGION_MEMORY */
- if (!(hose->regions[r].flags & PCI_REGION_MEMORY))
+ /* skip if !PCI_REGION_SYS_MEMORY */
+ if (!(hose->regions[r].flags & PCI_REGION_SYS_MEMORY))
continue;
bus_start = (u64)hose->regions[r].bus_start;
SC520_PCI_MEMORY_BUS,
SC520_PCI_MEMORY_PHYS,
SC520_PCI_MEMORY_SIZE,
- PCI_REGION_MEM | PCI_REGION_MEMORY);
+ PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
/* PCI memory space */
pci_set_region(hose->regions + 1,
pci_set_region(hose->regions + 2, CONFIG_SYS_PCI_SYS_MEM_BUS,
CONFIG_SYS_PCI_SYS_MEM_PHYS, CONFIG_SYS_PCI_SYS_MEM_SIZE,
- PCI_REGION_MEM | PCI_REGION_MEMORY);
+ PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
hose->region_count = 3;
pci_set_region(hose->regions + 2, CONFIG_SYS_PCI_SYS_MEM_BUS,
CONFIG_SYS_PCI_SYS_MEM_PHYS, CONFIG_SYS_PCI_SYS_MEM_SIZE,
- PCI_REGION_MEM | PCI_REGION_MEMORY);
+ PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
hose->region_count = 3;
CONFIG_PCI_MEMORY_BUS,
CONFIG_PCI_MEMORY_PHYS,
CONFIG_PCI_MEMORY_SIZE,
- PCI_REGION_MEM | PCI_REGION_MEMORY);
+ PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
/* PCI memory space */
pci_set_region(hose->regions + 1,
CONFIG_PCI_SYS_MEM_BUS,
CONFIG_PCI_SYS_MEM_PHYS,
CONFIG_PCI_SYS_MEM_SIZE,
- PCI_REGION_MEM | PCI_REGION_MEMORY);
+ PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
hose->region_count = 3;
CHRP_PCI_MEMORY_BUS,
CHRP_PCI_MEMORY_PHYS,
CHRP_PCI_MEMORY_SIZE,
- PCI_REGION_MEM | PCI_REGION_MEMORY);
+ PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
/* PCI memory space */
pci_set_region(hose->regions + 1,
pci_set_region (hose->regions + 0,
PCI_SLV_MEM_BUS,
PCI_SLV_MEM_LOCAL,
- gd->ram_size, PCI_REGION_MEM | PCI_REGION_MEMORY);
+ gd->ram_size, PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
#else
pci_set_region (hose->regions + 0,
CONFIG_SYS_SDRAM_BASE,
CONFIG_SYS_SDRAM_BASE,
- 0x4000000, PCI_REGION_MEM | PCI_REGION_MEMORY);
+ 0x4000000, PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
#endif
/* PCI memory space */
hose->regions[i].bus_start = 0;
hose->regions[i].phys_start = 0;
hose->regions[i].size = gd->ram_size;
- hose->regions[i].flags = PCI_REGION_MEM | PCI_REGION_MEMORY;
+ hose->regions[i].flags = PCI_REGION_MEM | PCI_REGION_SYS_MEMORY;
hose->first_busno = 0;
hose->last_busno = 0xff;
hose->regions[i].bus_start = 0;
hose->regions[i].phys_start = 0;
hose->regions[i].size = gd->ram_size;
- hose->regions[i].flags = PCI_REGION_MEM | PCI_REGION_MEMORY;
+ hose->regions[i].flags = PCI_REGION_MEM | PCI_REGION_SYS_MEMORY;
i = hose->region_count++;
hose->regions[i].bus_start = CONFIG_SYS_IMMR;
hose->regions[i].phys_start = CONFIG_SYS_IMMR;
hose->regions[i].size = 0x100000;
- hose->regions[i].flags = PCI_REGION_MEM | PCI_REGION_MEMORY;
+ hose->regions[i].flags = PCI_REGION_MEM | PCI_REGION_SYS_MEMORY;
hose->first_busno = max_bus;
hose->last_busno = 0xff;
ptmpcila[i], ptmla[i],
~(ptmms[i] & 0xfffff000) + 1,
PCI_REGION_MEM |
- PCI_REGION_MEMORY);
+ PCI_REGION_SYS_MEMORY);
}
/* PCI memory spaces */
CONFIG_PCI_SYS_MEM_BUS,
CONFIG_PCI_SYS_MEM_PHYS,
CONFIG_PCI_SYS_MEM_SIZE,
- PCI_REGION_MEM | PCI_REGION_MEMORY );
+ PCI_REGION_MEM | PCI_REGION_SYS_MEMORY );
#endif
hose->region_count = reg_num;
debug ("R0 bus_start: %llx phys_start: %llx size: %llx\n",
(u64)bus_start, (u64)phys_start, (u64)pci_sz);
pci_set_region(r++, bus_start, phys_start, pci_sz,
- PCI_REGION_MEM | PCI_REGION_MEMORY |
+ PCI_REGION_MEM | PCI_REGION_SYS_MEMORY |
PCI_REGION_PREFETCH);
sz -= pci_sz;
debug ("R1 bus_start: %llx phys_start: %llx size: %llx\n",
(u64)bus_start, (u64)phys_start, (u64)pci_sz);
pci_set_region(r++, bus_start, phys_start, pci_sz,
- PCI_REGION_MEM | PCI_REGION_MEMORY |
+ PCI_REGION_MEM | PCI_REGION_SYS_MEMORY |
PCI_REGION_PREFETCH);
sz -= pci_sz;
bus_start += pci_sz;
CONFIG_SYS_PCI64_MEMORY_BUS,
CONFIG_SYS_PCI_MEMORY_PHYS,
pci_sz,
- PCI_REGION_MEM | PCI_REGION_MEMORY |
+ PCI_REGION_MEM | PCI_REGION_SYS_MEMORY |
PCI_REGION_PREFETCH);
#else
pci_sz = 1ull << __ilog2_u64(sz);
debug ("R2 bus_start: %llx phys_start: %llx size: %llx\n",
(u64)bus_start, (u64)phys_start, (u64)pci_sz);
pci_set_region(r++, bus_start, phys_start, pci_sz,
- PCI_REGION_MEM | PCI_REGION_MEMORY |
+ PCI_REGION_MEM | PCI_REGION_SYS_MEMORY |
PCI_REGION_PREFETCH);
sz -= pci_sz;
bus_start += pci_sz;
for (r=0; r<hose->region_count; r++) {
u32 sz = (__ilog2_u64((u64)hose->regions[r].size) - 1);
- if (hose->regions[r].flags & PCI_REGION_MEMORY) { /* inbound */
+ if (hose->regions[r].flags & PCI_REGION_SYS_MEMORY) { /* inbound */
u32 flag = PIWAR_EN | PIWAR_LOCAL |
PIWAR_READ_SNOOP | PIWAR_WRITE_SNOOP;
pi->pitar = (hose->regions[r].phys_start >> 12);
/* System memory space */
pci_set_region (hose->regions + 0,
PCI_MEMORY_BUS,
- PCI_MEMORY_PHY, PCI_MEMORY_SIZE, PCI_REGION_MEMORY);
+ PCI_MEMORY_PHY, PCI_MEMORY_SIZE, PCI_REGION_SYS_MEMORY);
/* PCI memory space */
pci_set_region (hose->regions + 1,
pci_set_region (hose->regions + 0,
CONFIG_SYS_PCI_MEMORY_BUS,
CONFIG_SYS_PCI_MEMORY_PHYS,
- CONFIG_SYS_PCI_MEMORY_SIZE, PCI_REGION_MEM | PCI_REGION_MEMORY);
+ CONFIG_SYS_PCI_MEMORY_SIZE, PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
/* PCI memory space */
pci_set_region (hose->regions + 1,
#define PCI_REGION_TYPE 0x00000001
#define PCI_REGION_PREFETCH 0x00000008 /* prefetchable PCI memory */
-#define PCI_REGION_MEMORY 0x00000100 /* System memory */
+#define PCI_REGION_SYS_MEMORY 0x00000100 /* System memory */
#define PCI_REGION_RO 0x00000200 /* Read-only memory */
extern __inline__ void pci_set_region(struct pci_region *reg,