drm: Add DP last received PSR SDP VSC register and bits
authorJosé Roberto de Souza <jose.souza@intel.com>
Wed, 28 Mar 2018 22:30:38 +0000 (15:30 -0700)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Fri, 30 Mar 2018 17:17:47 +0000 (10:17 -0700)
This is a register to help debug what is in the last SDP VSC
packet revived by sink.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180328223046.16125-2-jose.souza@intel.com
include/drm/drm_dp_helper.h

index a62714578b93c3140eb8c1d6d58df169cc07fec1..c6853f0fef2a1c91502ece5744b2891909a1b66f 100644 (file)
 # define DP_LAST_ACTUAL_SYNCHRONIZATION_LATENCY_MASK   (0xf << 4)
 # define DP_LAST_ACTUAL_SYNCHRONIZATION_LATENCY_SHIFT  4
 
+#define DP_LAST_RECEIVED_PSR_SDP           0x200a /* eDP 1.2 */
+# define DP_PSR_STATE_BIT                  (1 << 0) /* eDP 1.2 */
+# define DP_UPDATE_RFB_BIT                 (1 << 1) /* eDP 1.2 */
+# define DP_CRC_VALID_BIT                  (1 << 2) /* eDP 1.2 */
+# define DP_SU_VALID                       (1 << 3) /* eDP 1.4 */
+# define DP_FIRST_SCAN_LINE_SU_REGION      (1 << 4) /* eDP 1.4 */
+# define DP_LAST_SCAN_LINE_SU_REGION       (1 << 5) /* eDP 1.4 */
+# define DP_Y_COORDINATE_VALID             (1 << 6) /* eDP 1.4a */
+
 #define DP_RECEIVER_ALPM_STATUS                    0x200b  /* eDP 1.4 */
 # define DP_ALPM_LOCK_TIMEOUT_ERROR        (1 << 0)