usb: Add EHCI support for Armada 38x (mvebu)

This patch adds USB EHCI host support for the common mvebu platform.
Including the Armada 38x.

Tested on DB-88F6280-GP eval board.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>

diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h
index e6bfbc25ee9e22d3334f2c3f83ed8954f2fae106..1aaea672eef57fc43ea0f2970ef4ec9f83ff7e1e 100644 (file)
--- a/arch/arm/mach-mvebu/include/mach/soc.h
+++ b/arch/arm/mach-mvebu/include/mach/soc.h
@@ -49,6 +49,7 @@
 #define MVEBU_EGIGA2_BASE      (MVEBU_REGISTER(0x30000))
 #define MVEBU_EGIGA3_BASE      (MVEBU_REGISTER(0x34000))
 #define MVEBU_REG_PCIE_BASE    (MVEBU_REGISTER(0x40000))
+#define MVEBU_USB20_BASE       (MVEBU_REGISTER(0x58000))
 #define MVEBU_EGIGA0_BASE      (MVEBU_REGISTER(0x70000))
 #define MVEBU_EGIGA1_BASE      (MVEBU_REGISTER(0x74000))
 #define MVEBU_SATA0_BASE       (MVEBU_REGISTER(0xa8000))

diff --git a/drivers/usb/host/ehci-marvell.c b/drivers/usb/host/ehci-marvell.c
index 1a5fd6eefc296bfee80552530cbb7237dffd3792..03c489c014a482eb4f7c66dcc0fbd962f4110ba1 100644 (file)
--- a/drivers/usb/host/ehci-marvell.c
+++ b/drivers/usb/host/ehci-marvell.c
@@ -10,6 +10,7 @@
 #include <asm/io.h>
 #include <usb.h>
 #include "ehci.h"
+#include <linux/mbus.h>
 #include <asm/arch/cpu.h>
 
 #if defined(CONFIG_KIRKWOOD)
@@ -30,6 +31,40 @@ DECLARE_GLOBAL_DATA_PTR;
 /*
  * USB 2.0 Bridge Address Decoding registers setup
  */
+#ifdef CONFIG_ARMADA_XP
+
+#define MVUSB0_BASE            MVEBU_USB20_BASE
+
+/*
+ * Once all the older Marvell SoC's (Orion, Kirkwood) are converted
+ * to the common mvebu archticture including the mbus setup, this
+ * will be the only function needed to configure the access windows
+ */
+static void usb_brg_adrdec_setup(void)
+{
+       const struct mbus_dram_target_info *dram;
+       int i;
+
+       dram = mvebu_mbus_dram_info();
+
+       for (i = 0; i < 4; i++) {
+               wrl(USB_WINDOW_CTRL(i), 0);
+               wrl(USB_WINDOW_BASE(i), 0);
+       }
+
+       for (i = 0; i < dram->num_cs; i++) {
+               const struct mbus_dram_window *cs = dram->cs + i;
+
+               /* Write size, attributes and target id to control register */
+               wrl(USB_WINDOW_CTRL(i),
+                   ((cs->size - 1) & 0xffff0000) | (cs->mbus_attr << 8) |
+                   (dram->mbus_dram_target_id << 4) | 1);
+
+               /* Write base address to base register */
+               wrl(USB_WINDOW_BASE(i), cs->base);
+       }
+}
+#else
 static void usb_brg_adrdec_setup(void)
 {
        int i;
@@ -69,6 +104,7 @@ static void usb_brg_adrdec_setup(void)
                wrl(USB_WINDOW_BASE(i), base);
        }
 }
+#endif
 
 /*
  * Create the appropriate control structures to manage