# CONFIG_64BIT_PHYS_ADDR is not set
CONFIG_ADM5120_GPIO=y
CONFIG_ADM5120_NR_UARTS=2
-# CONFIG_ATM_DRIVERS is not set
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
CONFIG_BASE_SMALL=0
# CONFIG_JOLIET is not set
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_MACH_ALCHEMY is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_MTD_NAND_DISKONCHIP is not set
# CONFIG_MTD_NAND_ECC_SMC is not set
CONFIG_MTD_NAND_IDS=y
-# CONFIG_MTD_NAND_MUSEUM_IDS is not set
# CONFIG_MTD_NAND_NANDSIM is not set
-# CONFIG_MTD_NAND_PLATFORM is not set
CONFIG_MTD_NAND_RB100=y
# CONFIG_MTD_NAND_VERIFY_WRITE is not set
# CONFIG_MTD_OBSOLETE_CHIPS is not set
# CONFIG_NET_PKTGEN is not set
CONFIG_NET_SCH_FIFO=y
# CONFIG_NET_VENDOR_3COM is not set
-# CONFIG_NETDEV_1000 is not set
# CONFIG_PAGE_SIZE_16KB is not set
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_64KB is not set
0x41, 0x42, 0x44, 0x48, 0x50, 0x60
};
+/* default settings - unlimited TX and RX on all ports, default shaper mode */
+static unsigned char bw_matrix[SW_DEVS] = {
+ 0, 0, 0, 0, 0, 0
+};
+
static int adm5120_nrdevs;
static struct net_device *adm5120_devs[SW_DEVS];
adm5120_set_reg(ADM5120_VLAN_GII, val);
}
+static void adm5120_set_bw(char *matrix)
+{
+ unsigned long val;
+
+ /* Port 0 to 3 are set using the bandwidth control 0 register */
+ val = matrix[0] + (matrix[1]<<8) + (matrix[2]<<16) + (matrix[3]<<24);
+ adm5120_set_reg(ADM5120_BW_CTL0, val);
+
+ /* Port 4 and 5 are set using the bandwidth control 1 register */
+ val = matrix[4];
+ if (matrix[5] == 1)
+ adm5120_set_reg(ADM5120_BW_CTL1, val | 0x80000000);
+ else
+ adm5120_set_reg(ADM5120_BW_CTL1, val & ~0x8000000);
+
+ printk(KERN_DEBUG "D: ctl0 0x%x, ctl1 0x%x\n",
+ adm5120_get_reg(ADM5120_BW_CTL0),
+ adm5120_get_reg(ADM5120_BW_CTL1));
+}
+
static int adm5120_sw_open(struct net_device *dev)
{
if (!adm5120_if_open++)
if (err)
return -EFAULT;
break;
+ case SIOCGETBW:
+ err = copy_to_user(rq->ifr_data, bw_matrix, sizeof(bw_matrix));
+ if (err)
+ return -EFAULT;
+ break;
+ case SIOCSETBW:
+ if (!capable(CAP_NET_ADMIN))
+ return -EPERM;
+ err = copy_from_user(bw_matrix, rq->ifr_data, sizeof(bw_matrix));
+ if (err)
+ return -EFAULT;
+ adm5120_set_bw(bw_matrix);
+ break;
default:
return -EOPNOTSUPP;
}
#define ADM5120_MAC_WRITE_DONE 0x00000002
#define ADM5120_VLAN_EN 0x00000040
#define ADM5120_MAC_WT1 0x5c
+#define ADM5120_BW_CTL0 0x60 /* Bandwidth control 0 */
+#define ADM5120_BW_CTL1 0x64 /* Bandwidth control 1 */
#define ADM5120_PHY_CNTL2 0x7c
#define ADM5120_AUTONEG 0x0000001f /* Auto negotiate */
#define ADM5120_NORMAL 0x01f00000 /* PHY normal mode */
#define SIOCSMATRIX SIOCDEVPRIVATE
#define SIOCGMATRIX SIOCDEVPRIVATE+1
#define SIOCGADMINFO SIOCDEVPRIVATE+2
+#define SIOCGETBW SIOCDEVPRIVATE+3
+#define SIOCSETBW SIOCDEVPRIVATE+4
struct adm5120_sw_info {
u16 magic;