drm/nouveau/sec2: utilise engine PRI address from TOP

Turing has its SEC2 instance in an alternate location, and this avoids
needing to duplicate the code here for it.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/sec2.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/sec2.h
index f7d89822b905626a7b934428e680baf3371f71b6..66684456daf70f8e54140165b357adcb23499cd7 100644 (file)
--- a/drivers/gpu/drm/nouveau/include/nvkm/engine/sec2.h
+++ b/drivers/gpu/drm/nouveau/include/nvkm/engine/sec2.h
@@ -5,6 +5,8 @@
 
 struct nvkm_sec2 {
        struct nvkm_engine engine;
+       u32 addr;
+
        struct nvkm_falcon *falcon;
        struct nvkm_msgqueue *queue;
        struct work_struct work;

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/sec2/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/sec2/base.c
index f865d2a3e18424171170220e4df5953a54e43220..1b49e5b6717fd0145dbbdc2cd05ae2e65fc5743c 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/sec2/base.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/sec2/base.c
@@ -22,6 +22,7 @@
 #include "priv.h"
 
 #include <core/msgqueue.h>
+#include <subdev/top.h>
 #include <engine/falcon.h>
 
 static void *
@@ -39,18 +40,18 @@ nvkm_sec2_intr(struct nvkm_engine *engine)
        struct nvkm_sec2 *sec2 = nvkm_sec2(engine);
        struct nvkm_subdev *subdev = &engine->subdev;
        struct nvkm_device *device = subdev->device;
-       u32 disp = nvkm_rd32(device, 0x8701c);
-       u32 intr = nvkm_rd32(device, 0x87008) & disp & ~(disp >> 16);
+       u32 disp = nvkm_rd32(device, sec2->addr + 0x01c);
+       u32 intr = nvkm_rd32(device, sec2->addr + 0x008) & disp & ~(disp >> 16);
 
        if (intr & 0x00000040) {
                schedule_work(&sec2->work);
-               nvkm_wr32(device, 0x87004, 0x00000040);
+               nvkm_wr32(device, sec2->addr + 0x004, 0x00000040);
                intr &= ~0x00000040;
        }
 
        if (intr) {
                nvkm_error(subdev, "unhandled intr %08x\n", intr);
-               nvkm_wr32(device, 0x87004, intr);
+               nvkm_wr32(device, sec2->addr + 0x004, intr);
 
        }
 }
@@ -74,8 +75,15 @@ static int
 nvkm_sec2_oneinit(struct nvkm_engine *engine)
 {
        struct nvkm_sec2 *sec2 = nvkm_sec2(engine);
-       return nvkm_falcon_v1_new(&sec2->engine.subdev, "SEC2", 0x87000,
-                                 &sec2->falcon);
+       struct nvkm_subdev *subdev = &sec2->engine.subdev;
+
+       if (!sec2->addr) {
+               sec2->addr = nvkm_top_addr(subdev->device, subdev->index);
+               if (WARN_ON(!sec2->addr))
+                       return -EINVAL;
+       }
+
+       return nvkm_falcon_v1_new(subdev, "SEC2", sec2->addr, &sec2->falcon);
 }
 
 static int
@@ -95,13 +103,14 @@ nvkm_sec2 = {
 };
 
 int
-nvkm_sec2_new_(struct nvkm_device *device, int index,
+nvkm_sec2_new_(struct nvkm_device *device, int index, u32 addr,
               struct nvkm_sec2 **psec2)
 {
        struct nvkm_sec2 *sec2;
 
        if (!(sec2 = *psec2 = kzalloc(sizeof(*sec2), GFP_KERNEL)))
                return -ENOMEM;
+       sec2->addr = addr;
        INIT_WORK(&sec2->work, nvkm_sec2_recv);
 
        return nvkm_engine_ctor(&nvkm_sec2, device, index, true, &sec2->engine);

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/sec2/gp102.c b/drivers/gpu/drm/nouveau/nvkm/engine/sec2/gp102.c
index 9be1524c08f56df08e78f04db815e3b4c64f69a7..858cf27fa0103e3951cb5672c69e74e4e37fa14e 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/sec2/gp102.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/sec2/gp102.c
@@ -26,5 +26,5 @@ int
 gp102_sec2_new(struct nvkm_device *device, int index,
               struct nvkm_sec2 **psec2)
 {
-       return nvkm_sec2_new_(device, index, psec2);
+       return nvkm_sec2_new_(device, index, 0, psec2);
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/sec2/priv.h b/drivers/gpu/drm/nouveau/nvkm/engine/sec2/priv.h
index 2f97c806a79d824cab3cc976235df689ce62b260..ab0165e2d1a3aa2bf5db7ec41720de845423ec70 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/sec2/priv.h
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/sec2/priv.h
@@ -5,6 +5,5 @@
 
 #define nvkm_sec2(p) container_of((p), struct nvkm_sec2, engine)
 
-int nvkm_sec2_new_(struct nvkm_device *, int, struct nvkm_sec2 **);
-
+int nvkm_sec2_new_(struct nvkm_device *, int, u32 addr, struct nvkm_sec2 **);
 #endif