drm/amdgpu: only enable swiotlb alloc when need v2
authorChunming Zhou <david1.zhou@amd.com>
Fri, 9 Feb 2018 02:44:09 +0000 (10:44 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 13 Feb 2018 18:33:32 +0000 (13:33 -0500)
get the max io mapping address of system memory to see if it is over
our card accessing range.
v2: move checking later

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180209024410.1469-2-david1.zhou@amd.com
drivers/gpu/drm/amd/amdgpu/amdgpu.h
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

index d5a2eefd6c3e9c634597dba673a6ee25a60c830d..31126df06c8ca5c4463765fb2fd7e319dacccc75 100644 (file)
@@ -1504,6 +1504,7 @@ struct amdgpu_device {
        const struct amdgpu_asic_funcs  *asic_funcs;
        bool                            shutdown;
        bool                            need_dma32;
+       bool                            need_swiotlb;
        bool                            accel_working;
        struct work_struct              reset_work;
        struct notifier_block           acpi_nb;
index e4bb435e614b86cacd4f264526423d73e3d32ace..d897c4c61a01f732c851f784f39a0a38d28e5493 100644 (file)
@@ -1018,7 +1018,7 @@ static int amdgpu_ttm_tt_populate(struct ttm_tt *ttm,
        }
 
 #ifdef CONFIG_SWIOTLB
-       if (swiotlb_nr_tbl()) {
+       if (adev->need_swiotlb && swiotlb_nr_tbl()) {
                return ttm_dma_populate(&gtt->ttm, adev->dev, ctx);
        }
 #endif
@@ -1045,7 +1045,7 @@ static void amdgpu_ttm_tt_unpopulate(struct ttm_tt *ttm)
        adev = amdgpu_ttm_adev(ttm->bdev);
 
 #ifdef CONFIG_SWIOTLB
-       if (swiotlb_nr_tbl()) {
+       if (adev->need_swiotlb && swiotlb_nr_tbl()) {
                ttm_dma_unpopulate(&gtt->ttm, adev->dev);
                return;
        }
@@ -2010,7 +2010,7 @@ static int amdgpu_ttm_debugfs_init(struct amdgpu_device *adev)
        count = ARRAY_SIZE(amdgpu_ttm_debugfs_list);
 
 #ifdef CONFIG_SWIOTLB
-       if (!swiotlb_nr_tbl())
+       if (!(adev->need_swiotlb && swiotlb_nr_tbl()))
                --count;
 #endif
 
index 8e28270d1ea969e96b37d6c18bd7e9f2bc50c748..5f5eb15ccf4ad336e12f30f89ab750c0f6afc28f 100644 (file)
@@ -22,6 +22,7 @@
  */
 #include <linux/firmware.h>
 #include <drm/drmP.h>
+#include <drm/drm_cache.h>
 #include "amdgpu.h"
 #include "gmc_v6_0.h"
 #include "amdgpu_ucode.h"
@@ -851,6 +852,7 @@ static int gmc_v6_0_sw_init(void *handle)
                pci_set_consistent_dma_mask(adev->pdev, DMA_BIT_MASK(32));
                dev_warn(adev->dev, "amdgpu: No coherent DMA available.\n");
        }
+       adev->need_swiotlb = drm_get_max_iomem() > ((u64)1 << dma_bits);
 
        r = gmc_v6_0_init_microcode(adev);
        if (r) {
index 86e9d682c59e8760d0751d38908a4c072764e123..12e49bd8fd2da33ad608b1f56d5c2b5de941d9f7 100644 (file)
@@ -22,6 +22,7 @@
  */
 #include <linux/firmware.h>
 #include <drm/drmP.h>
+#include <drm/drm_cache.h>
 #include "amdgpu.h"
 #include "cikd.h"
 #include "cik.h"
@@ -999,6 +1000,7 @@ static int gmc_v7_0_sw_init(void *handle)
                pci_set_consistent_dma_mask(adev->pdev, DMA_BIT_MASK(32));
                pr_warn("amdgpu: No coherent DMA available\n");
        }
+       adev->need_swiotlb = drm_get_max_iomem() > ((u64)1 << dma_bits);
 
        r = gmc_v7_0_init_microcode(adev);
        if (r) {
index 9a813d834f1a21e72908cea34a0641343c848e30..9a170e37fbe7598f84bada7ce582148db34d2cc3 100644 (file)
@@ -22,6 +22,7 @@
  */
 #include <linux/firmware.h>
 #include <drm/drmP.h>
+#include <drm/drm_cache.h>
 #include "amdgpu.h"
 #include "gmc_v8_0.h"
 #include "amdgpu_ucode.h"
@@ -1085,6 +1086,7 @@ static int gmc_v8_0_sw_init(void *handle)
         */
        adev->need_dma32 = false;
        dma_bits = adev->need_dma32 ? 32 : 40;
+       adev->need_swiotlb = drm_get_max_iomem() > ((u64)1 << dma_bits);
        r = pci_set_dma_mask(adev->pdev, DMA_BIT_MASK(dma_bits));
        if (r) {
                adev->need_dma32 = true;
@@ -1096,6 +1098,7 @@ static int gmc_v8_0_sw_init(void *handle)
                pci_set_consistent_dma_mask(adev->pdev, DMA_BIT_MASK(32));
                pr_warn("amdgpu: No coherent DMA available\n");
        }
+       adev->need_swiotlb = drm_get_max_iomem() > ((u64)1 << dma_bits);
 
        r = gmc_v8_0_init_microcode(adev);
        if (r) {
index eb8b1bb66389522991599827c5ed407a000bbe91..71d3aedefd69efa9cb63cc10cfdc92147f702fbf 100644 (file)
@@ -21,6 +21,7 @@
  *
  */
 #include <linux/firmware.h>
+#include <drm/drm_cache.h>
 #include "amdgpu.h"
 #include "gmc_v9_0.h"
 #include "amdgpu_atomfirmware.h"
@@ -850,6 +851,7 @@ static int gmc_v9_0_sw_init(void *handle)
                pci_set_consistent_dma_mask(adev->pdev, DMA_BIT_MASK(32));
                printk(KERN_WARNING "amdgpu: No coherent DMA available.\n");
        }
+       adev->need_swiotlb = drm_get_max_iomem() > ((u64)1 << dma_bits);
 
        r = gmc_v9_0_mc_init(adev);
        if (r)