#ifndef CONFIG_BOOTARGS_ROOT
# define CONFIG_BOOTARGS_ROOT "/dev/mtdblock0 rw"
#endif
+#ifndef FLASHBOOT_ENV_SETTINGS
+# define FLASHBOOT_ENV_SETTINGS "flashboot=bootm 0x20100000\0"
+#endif
#define CONFIG_BOOTARGS \
"root=" CONFIG_BOOTARGS_ROOT " " \
"clkin_hz=" MK_STR(CONFIG_CLKIN_HZ) " " \
#define CONFIG_EXTRA_ENV_SETTINGS \
NAND_ENV_SETTINGS \
NETWORK_ENV_SETTINGS \
- "flashboot=bootm 0x20100000\0"
+ FLASHBOOT_ENV_SETTINGS
/*
* Network Settings
/* Values can range from 1-15 */
#define CONFIG_SCLK_DIV 4
+/* Decrease core voltage */
+#define CONFIG_VR_CTL_VAL (VLEV_120 | CLKBUFOE | FREQ_1000)
+
/*
* Memory Settings
#define CONFIG_ENV_ADDR 0x20008000
#define CONFIG_ENV_OFFSET 0x8000
#define CONFIG_ENV_SIZE 0x8000
-#define CONFIG_ENV_SECT_SIZE 0x20000
+#define CONFIG_ENV_SECT_SIZE 0x8000
#define CONFIG_ENV_IS_EMBEDDED_IN_LDR
#define CONFIG_MISC_INIT_R
#define CONFIG_RTC_BFIN
#define CONFIG_UART_CONSOLE 0
+#define CONFIG_BOOTCOMMAND "run flashboot"
+#define FLASHBOOT_ENV_SETTINGS \
+ "flashboot=flread 20040000 1000000 300000;" \
+ "bootm 0x1000000\0"
/*
/* Values can range from 1-15 */
#define CONFIG_SCLK_DIV 5
+/* Decrease core voltage */
+#define CONFIG_VR_CTL_VAL (VLEV_115 | GAIN_20 | FREQ_1000)
+
/*
* Memory Settings
*/
#define CONFIG_BAUDRATE 115200
#define CONFIG_UART_CONSOLE 0
+#define CONFIG_BOOTCOMMAND "run flashboot"
+#define FLASHBOOT_ENV_SETTINGS "flashboot=bootm 0x20040000\0"
/*
/* Values can range from 1-15 */
#define CONFIG_SCLK_DIV 4
+/* Decrease core voltage */
+#define CONFIG_VR_CTL_VAL (VLEV_115 | CLKBUFOE | GAIN_20 | FREQ_1000)
+
/*
* Memory Settings
#define CONFIG_MISC_INIT_R
#define CONFIG_RTC_BFIN
#define CONFIG_UART_CONSOLE 0
+#define CONFIG_BOOTCOMMAND "run flashboot"
+#define FLASHBOOT_ENV_SETTINGS \
+ "flashboot=flread 20040000 1000000 300000;" \
+ "bootm 0x1000000\0"
/*
#define CONFIG_MISC_INIT_R
#define CONFIG_RTC_BFIN
#define CONFIG_UART_CONSOLE 0
+#define CONFIG_BOOTCOMMAND "run flashboot"
+#define FLASHBOOT_ENV_SETTINGS \
+ "flashboot=flread 20040000 1000000 280000;" \
+ "bootm 0x1000000\0"
/*
*/
#include <configs/bfin_adi_common.h>
-#undef CONFIG_BOOTCOMMAND
-#define CONFIG_BOOTCOMMAND "run flashboot"
-
-#undef CONFIG_EXTRA_ENV_SETTINGS
-#define CONFIG_EXTRA_ENV_SETTINGS \
- NAND_ENV_SETTINGS \
- NETWORK_ENV_SETTINGS \
- "flashboot=flread 20040000 1000000 280000; bootm 0x1000000\0"
-
#endif
/* Values can range from 1-15 */
#define CONFIG_SCLK_DIV 4
+/* Decrease core voltage */
+#define CONFIG_VR_CTL_VAL (VLEV_115 | GAIN_20 | FREQ_1000)
+
/*
* Memory Settings
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_RTC_BFIN
#define CONFIG_UART_CONSOLE 1
+#define CONFIG_BOOTCOMMAND "run flashboot"
+#define FLASHBOOT_ENV_SETTINGS "flashboot=bootm 0x20040000\0"
#ifndef __ADSPBF542__
/* Don't waste time transferring a logo over the UART */
#define CONFIG_PLL_BYPASS 0
/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
/* Values can range from 0-63 (where 0 means 64) */
-#define CONFIG_VCO_MULT 22
+#define CONFIG_VCO_MULT 20
/* CCLK_DIV controls the core clock divider */
/* Values can be 1, 2, 4, or 8 ONLY */
#define CONFIG_CCLK_DIV 1
/* Values can range from 1-15 */
#define CONFIG_SCLK_DIV 5
+/* Decrease core voltage */
+#define CONFIG_VR_CTL_VAL (VLEV_110 | GAIN_20 | FREQ_1000)
+
/*
* Memory Settings
*/
#define CONFIG_BAUDRATE 115200
#define CONFIG_UART_CONSOLE 0
+#define CONFIG_BOOTCOMMAND "run flashboot"
+#define FLASHBOOT_ENV_SETTINGS "flashboot=bootm 0x20040000\0"
/*
/* Values can range from 1-15 */
#define CONFIG_SCLK_DIV 4
+/* Decrease core voltage */
+#define CONFIG_VR_CTL_VAL (VLEV_115 | CLKBUFOE | GAIN_20 | FREQ_1000)
+
/*
* Memory Settings
#define CONFIG_MISC_INIT_R
#define CONFIG_RTC_BFIN
#define CONFIG_UART_CONSOLE 0
+#define CONFIG_BOOTCOMMAND "run flashboot"
+#define FLASHBOOT_ENV_SETTINGS \
+ "flashboot=flread 20040000 1000000 280000;" \
+ "bootm 0x1000000\0"
/*