drm/amd/display: add nv14 cases to amdgpu_dm

Mostly shared with navi10.

Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 4a29f72334d0fa88d738a93f5bd3778c30a81615..08b7149e9b70a15947c55711bbf91b9cb7df7730 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -2359,6 +2359,7 @@ static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev)
        case CHIP_RAVEN:
 #if defined(CONFIG_DRM_AMD_DC_DCN2_0)
        case CHIP_NAVI10:
+       case CHIP_NAVI14:
 #endif
                if (dcn10_register_irq_handlers(dm->adev)) {
                        DRM_ERROR("DM: Failed to initialize IRQ\n");
@@ -2519,6 +2520,11 @@ static int dm_early_init(void *handle)
                adev->mode_info.num_hpd = 6;
                adev->mode_info.num_dig = 6;
                break;
+       case CHIP_NAVI14:
+               adev->mode_info.num_crtc = 5;
+               adev->mode_info.num_hpd = 5;
+               adev->mode_info.num_dig = 5;
+               break;
 #endif
        default:
                DRM_ERROR("Unsupported ASIC type: 0x%X\n", adev->asic_type);
@@ -2814,6 +2820,7 @@ fill_plane_buffer_attributes(struct amdgpu_device *adev,
            adev->asic_type == CHIP_VEGA20 ||
 #if defined(CONFIG_DRM_AMD_DC_DCN2_0)
            adev->asic_type == CHIP_NAVI10 ||
+           adev->asic_type == CHIP_NAVI14 ||
 #endif
            adev->asic_type == CHIP_RAVEN) {
                /* Fill GFX9 params */