ramips: dts: rt5350: reset FE and ESW cores together

Failing to do so will cause the DMA engine to not initialize properly
and fail to forward packets between them, and in some cases will cause
spurious transmission with size exceeding allowed packet size, causing a
kernel panic.

This is behaviour of downstream driver as well, however I
haven't observed bug reports about this SoC in the wild, so this
commit's purpose is to align this chip with all other SoC's - MT7620
were already using this arrangement.

Fixes: #9284
Fixes: 60fadae62b64 ("ramips: ethernet: ralink: move reset of the esw into the esw instead of fe")
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>

diff --git a/target/linux/ramips/dts/rt5350.dtsi b/target/linux/ramips/dts/rt5350.dtsi
index 9bbbc611edddaaf21aa660fef951847ec7a6a7f3..30f64358423eb0101cb02e4878f1f472dbeb4f68 100644 (file)
--- a/target/linux/ramips/dts/rt5350.dtsi
+++ b/target/linux/ramips/dts/rt5350.dtsi
@@ -340,8 +340,8 @@
 
                clocks = <&sysc 12>;
 
-               resets = <&sysc 21>;
-               reset-names = "fe";
+               resets = <&sysc 21>, <&sysc 23>;
+               reset-names = "fe", "esw";
 
                interrupt-parent = <&cpuintc>;
                interrupts = <5>;
@@ -353,8 +353,8 @@
                compatible = "ralink,rt5350-esw", "ralink,rt3050-esw";
                reg = <0x10110000 0x8000>;
 
-               resets = <&sysc 23>, <&sysc 24>;
-               reset-names = "esw", "ephy";
+               resets = <&sysc 24>;
+               reset-names = "ephy";
 
                interrupt-parent = <&intc>;
                interrupts = <17>;