* SPDX-License-Identifier: GPL-2.0+
*/
-#ifndef _SYS_PROTO_H_
-#define _SYS_PROTO_H_
+#ifndef _MX31_SYS_PROTO_H_
+#define _MX31_SYS_PROTO_H_
-#include "../arch-imx/cpu.h"
+#include <asm/imx-common/sys_proto.h>
struct mxc_weimcs {
u32 upper;
void mxc_setup_weimcs(int cs, const struct mxc_weimcs *weimcs);
int mxc_mmc_init(bd_t *bis);
-u32 get_cpu_rev(void);
#endif
* SPDX-License-Identifier: GPL-2.0+
*/
-#ifndef _SYS_PROTO_H_
-#define _SYS_PROTO_H_
+#ifndef _MX35_SYS_PROTO_H_
+#define _MX35_SYS_PROTO_H_
-u32 get_cpu_rev(void);
-void mx3_setup_sdram_bank(u32 start_address, u32 ddr2_config,
- u32 row, u32 col, u32 dsize, u32 refresh);
-#define is_soc_rev(rev) ((get_cpu_rev() & 0xFF) - rev)
+#include <asm/imx-common/sys_proto.h>
+
+void mx3_setup_sdram_bank(u32 start_address, u32 ddr2_config, u32 row,
+ u32 col, u32 dsize, u32 refresh);
#endif
* SPDX-License-Identifier: GPL-2.0+
*/
-#ifndef _SYS_PROTO_H_
-#define _SYS_PROTO_H_
-
-#include "../arch-imx/cpu.h"
-
-#define is_soc_rev(rev) ((get_cpu_rev() & 0xFF) - rev)
-u32 get_cpu_rev(void);
-unsigned imx_ddr_size(void);
-void sdelay(unsigned long);
-void set_chipselect_size(int const);
-
-/*
- * Initializes on-chip ethernet controllers.
- * to override, implement board_eth_init()
- */
-
-int fecmxc_initialize(bd_t *bis);
-u32 get_ahb_clk(void);
-u32 get_periph_clk(void);
-
-#endif
+#include <asm/imx-common/sys_proto.h>
* SPDX-License-Identifier: GPL-2.0+
*/
-#ifndef _SYS_PROTO_H_
-#define _SYS_PROTO_H_
-
-#include <asm/imx-common/regs-common.h>
-#include "../arch-imx/cpu.h"
-
-#define soc_rev() (get_cpu_rev() & 0xFF)
-#define is_soc_rev(rev) (soc_rev() == rev)
-
-u32 get_nr_cpus(void);
-u32 get_cpu_rev(void);
-u32 get_cpu_speed_grade_hz(void);
-u32 get_cpu_temp_grade(int *minc, int *maxc);
-
-/* returns MXC_CPU_ value */
-#define cpu_type(rev) (((rev) >> 12) & 0xff)
-
-/* both macros return/take MXC_CPU_ constants */
-#define get_cpu_type() (cpu_type(get_cpu_rev()))
-#define is_cpu_type(cpu) (get_cpu_type() == cpu)
-
-const char *get_imx_type(u32 imxtype);
-unsigned imx_ddr_size(void);
-void set_chipselect_size(int const);
-
-#define is_mx6dqp() (is_cpu_type(MXC_CPU_MX6QP) || is_cpu_type(MXC_CPU_MX6DP))
-
-/*
- * Initializes on-chip ethernet controllers.
- * to override, implement board_eth_init()
- */
-
-int fecmxc_initialize(bd_t *bis);
-u32 get_ahb_clk(void);
-u32 get_periph_clk(void);
-
-int mxs_reset_block(struct mxs_register_32 *reg);
-int mxs_wait_mask_set(struct mxs_register_32 *reg,
- uint32_t mask,
- unsigned int timeout);
-int mxs_wait_mask_clr(struct mxs_register_32 *reg,
- uint32_t mask,
- unsigned int timeout);
-#endif
+#include <asm/imx-common/sys_proto.h>
* SPDX-License-Identifier: GPL-2.0+
*/
-#ifndef __SYS_PROTO_H__
-#define __SYS_PROTO_H__
+#ifndef __MXS_SYS_PROTO_H__
+#define __MXS_SYS_PROTO_H__
-#include <asm/imx-common/regs-common.h>
-#include <../arch-imx/cpu.h>
-
-int mxs_reset_block(struct mxs_register_32 *reg);
-int mxs_wait_mask_set(struct mxs_register_32 *reg,
- uint32_t mask,
- unsigned int timeout);
-int mxs_wait_mask_clr(struct mxs_register_32 *reg,
- uint32_t mask,
- unsigned int timeout);
+#include <asm/imx-common/sys_proto.h>
int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int), int (*cd)(int));
--- /dev/null
+/*
+ * (C) Copyright 2009
+ * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _SYS_PROTO_H_
+#define _SYS_PROTO_H_
+
+#include <asm/imx-common/regs-common.h>
+#include <common.h>
+#include "../arch-imx/cpu.h"
+
+#define soc_rev() (get_cpu_rev() & 0xFF)
+#define is_soc_rev(rev) (soc_rev() == rev)
+
+/* returns MXC_CPU_ value */
+#define cpu_type(rev) (((rev) >> 12) & 0xff)
+/* both macros return/take MXC_CPU_ constants */
+#define get_cpu_type() (cpu_type(get_cpu_rev()))
+#define is_cpu_type(cpu) (get_cpu_type() == cpu)
+
+#define is_mx6dqp() (is_cpu_type(MXC_CPU_MX6QP) || is_cpu_type(MXC_CPU_MX6DP))
+
+u32 get_nr_cpus(void);
+u32 get_cpu_rev(void);
+u32 get_cpu_speed_grade_hz(void);
+u32 get_cpu_temp_grade(int *minc, int *maxc);
+const char *get_imx_type(u32 imxtype);
+u32 imx_ddr_size(void);
+void sdelay(unsigned long);
+void set_chipselect_size(int const);
+
+/*
+ * Initializes on-chip ethernet controllers.
+ * to override, implement board_eth_init()
+ */
+int fecmxc_initialize(bd_t *bis);
+u32 get_ahb_clk(void);
+u32 get_periph_clk(void);
+
+int mxs_reset_block(struct mxs_register_32 *reg);
+int mxs_wait_mask_set(struct mxs_register_32 *reg, u32 mask, u32 timeout);
+int mxs_wait_mask_clr(struct mxs_register_32 *reg, u32 mask, u32 timeout);
+#endif