ACTIM_CTRLB(MICRON_TWTR_165, MICRON_TCKE_165, \
MICRON_TXP_165, MICRON_XSR_165)
-#define MICRON_RASWIDTH 0x2
-#define MICRON_V_MCFG(size) MCFG((size), MICRON_RASWIDTH)
+#define MICRON_RASWIDTH_165 0x2
+#define MICRON_V_MCFG_165(size) MCFG((size), MICRON_RASWIDTH_165)
-#define MICRON_BL 0x2
-#define MICRON_SIL 0x0
-#define MICRON_CASL 0x3
-#define MICRON_WBST 0x0
-#define MICRON_V_MR ((MICRON_WBST << 9) | (MICRON_CASL << 4) | \
- (MICRON_SIL << 3) | (MICRON_BL))
+#define MICRON_BL_165 0x2
+#define MICRON_SIL_165 0x0
+#define MICRON_CASL_165 0x3
+#define MICRON_WBST_165 0x0
+#define MICRON_V_MR_165 ((MICRON_WBST_165 << 9) | \
+ (MICRON_CASL_165 << 4) | (MICRON_SIL_165 << 3) | \
+ (MICRON_BL_165))
/* NUMONYX part of IGEP v2 (165MHz optimized) 6.06ns */
#define NUMONYX_TDAL_165 6 /* Twr/Tck + Trp/tck */
#ifdef CONFIG_OMAP3_MICRON_DDR
#define V_ACTIMA_165 MICRON_V_ACTIMA_165
#define V_ACTIMB_165 MICRON_V_ACTIMB_165
-#define V_MCFG MICRON_V_MCFG(PHYS_SDRAM_1_SIZE)
+#define V_MCFG MICRON_V_MCFG_165(PHYS_SDRAM_1_SIZE)
#define V_RFR_CTRL SDP_3430_SDRC_RFR_CTRL_165MHz
-#define V_MR MICRON_V_MR
+#define V_MR MICRON_V_MR_165
#endif
#ifdef CONFIG_OMAP3_NUMONYX_DDR