arm: exynos: clock: support SPLL as mmc source clock for exynos5420
authorJoonyoung Shim <jy0922.shim@samsung.com>
Mon, 22 Dec 2014 10:46:30 +0000 (19:46 +0900)
committerMinkyu Kang <mk7.kang@samsung.com>
Wed, 24 Dec 2014 01:56:24 +0000 (10:56 +0900)
MMC of exynos5420 can select SPLL as source clock, so add to support
SPLL in exynos5420_get_mmc_clk(). It was tested on Odroid-XU3 board.

Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
arch/arm/cpu/armv7/exynos/clock.c

index 8fab135bebf4ef6900677847b60a8e1a1520254c..b31c13b14bfbd1c4d663e4f518bdd486e4736c72 100644 (file)
@@ -848,6 +848,8 @@ static unsigned long exynos5420_get_mmc_clk(int dev_index)
 
        if (sel == 0x3)
                sclk = get_pll_clk(MPLL);
+       else if (sel == 0x4)
+               sclk = get_pll_clk(SPLL);
        else if (sel == 0x6)
                sclk = get_pll_clk(EPLL);
        else