&pcie {
status = "okay";
+};
+
+&pcie0 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x8000>;
+ ieee80211-freq-limit = <5000000 6000000>;
- pcie-bridge {
- mt76@0,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x8000>;
- ieee80211-freq-limit = <5000000 6000000>;
-
- led {
- led-sources = <2>;
- led-active-low;
- };
+ led {
+ led-sources = <2>;
+ led-active-low;
};
};
};
&pcie {
status = "okay";
+};
- pcie-bridge {
- mt76@0,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&radio 0x8000>;
- };
+&pcie0 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&radio 0x8000>;
};
};
&pcie {
status = "okay";
+};
- pcie-bridge {
- mt76@0,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&radio 32768>;
- };
+&pcie0 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&radio 32768>;
};
};
&pcie {
status = "okay";
+};
- pcie-bridge {
- mt76@0,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&radio 0x8000>;
- ieee80211-freq-limit = <5000000 6000000>;
- mtd-mac-address = <&rom 0xf100>;
- mtd-mac-address-increment = <(-1)>;
- };
+&pcie0 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&radio 0x8000>;
+ ieee80211-freq-limit = <5000000 6000000>;
+ mtd-mac-address = <&rom 0xf100>;
+ mtd-mac-address-increment = <(-1)>;
};
};
&pcie {
status = "okay";
+};
- pcie-bridge {
- mt76@0,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x28000>;
- ieee80211-freq-limit = <5000000 6000000>;
- mtd-mac-address = <&factory 0xf100>;
- mtd-mac-address-increment = <(-1)>;
- };
+&pcie0 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x28000>;
+ ieee80211-freq-limit = <5000000 6000000>;
+ mtd-mac-address = <&factory 0xf100>;
+ mtd-mac-address-increment = <(-1)>;
};
};
&pcie {
status = "okay";
+};
- pcie-bridge {
- mt76@0,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&radio 32768>;
- ieee80211-freq-limit = <5000000 6000000>;
- mtd-mac-address = <&rom 0xf100>;
- mtd-mac-address-increment = <(-1)>;
- };
+&pcie0 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&radio 32768>;
+ ieee80211-freq-limit = <5000000 6000000>;
+ mtd-mac-address = <&rom 0xf100>;
+ mtd-mac-address-increment = <(-1)>;
};
};
&pcie {
status = "okay";
+};
- pcie-bridge {
- mt76@0,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x28000>;
- ieee80211-freq-limit = <5000000 6000000>;
- mtd-mac-address = <&factory 0xf100>;
- mtd-mac-address-increment = <(-1)>;
- };
+&pcie0 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x28000>;
+ ieee80211-freq-limit = <5000000 6000000>;
+ mtd-mac-address = <&factory 0xf100>;
+ mtd-mac-address-increment = <(-1)>;
};
};
&pcie {
status = "okay";
+};
- pcie-bridge {
- mt76@0,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&radio 32768>;
- };
+&pcie0 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&radio 32768>;
};
};
&pci {
status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&pci_pins>;
-
- pci_pins: pci {
- pci {
- ralink,group = "pci";
- ralink,function = "pci-fnc";
- };
- };
+};
- host-bridge {
- pci-bridge@1 {
- status = "okay";
+&pci1 {
+ status = "okay";
- wifi@0,0 {
- compatible = "pci0,0";
- reg = <0x10000 0 0 0 0>;
- ralink,5ghz = <0>;
- ralink,mtd-eeprom = <&factory 0x8000>;
- };
- };
+ wifi@0,0 {
+ compatible = "pci0,0";
+ reg = <0x10000 0 0 0 0>;
+ ralink,5ghz = <0>;
+ ralink,mtd-eeprom = <&factory 0x8000>;
};
};
&pci {
status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&pci_pins>;
-
- pci_pins: pci {
- pci {
- ralink,group = "pci";
- ralink,function = "pci-fnc";
- };
- };
+};
- host-bridge {
- pci-bridge@1 {
- status = "okay";
+&pci1 {
+ status = "okay";
- wifi@0,0 {
- compatible = "pci0,0";
- reg = <0x10000 0 0 0 0>;
- ralink,5ghz = <0>;
- ralink,mtd-eeprom = <&factory 0x2000>;
- };
- };
+ wifi@0,0 {
+ compatible = "pci0,0";
+ reg = <0x10000 0 0 0 0>;
+ ralink,5ghz = <0>;
+ ralink,mtd-eeprom = <&factory 0x2000>;
};
};
&pcie {
status = "okay";
+};
- pcie0 {
- mt76@0,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&radio 0x2000>;
- ieee80211-freq-limit = <5000000 6000000>;
- };
+&pcie0 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&radio 0x2000>;
+ ieee80211-freq-limit = <5000000 6000000>;
};
+};
- pcie1 {
- mt76@1,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&radio 0>;
- ieee80211-freq-limit = <2400000 2500000>;
- };
+&pcie1 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&radio 0>;
+ ieee80211-freq-limit = <2400000 2500000>;
};
};
&pcie {
status = "okay";
+};
- pcie0 {
- mt76@0,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x8000>;
- ieee80211-freq-limit = <5000000 6000000>;
- };
+&pcie0 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x8000>;
+ ieee80211-freq-limit = <5000000 6000000>;
};
+};
- pcie1 {
- mt76@1,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x0000>;
- ieee80211-freq-limit = <2400000 2500000>;
- };
+&pcie1 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x0000>;
+ ieee80211-freq-limit = <2400000 2500000>;
};
};
&pcie {
status = "okay";
+};
- pcie-bridge {
- mt76@0,0 {
- reg = <0x0000 0 0 0 0 >;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x8000>;
- ieee80211-freq-limit = <5000000 6000000>;
- };
+&pcie0 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0 >;
+ mediatek,mtd-eeprom = <&factory 0x8000>;
+ ieee80211-freq-limit = <5000000 6000000>;
};
};
led-status = &led_wired_blue;
};
- pci@440000 {
- status = "ok";
- };
-
cfi@1f000000 {
compatible = "cfi-flash";
reg = <0xbc400000 0x800000>;
};
};
+&pci {
+ status = "okay";
+};
+
&wmac {
status = "okay";
ralink,mtd-eeprom = <&factory 0x0>;
&pcie {
status = "okay";
+};
- pcie0 {
- mt76@0,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x8000>;
- ieee80211-freq-limit = <5000000 6000000>;
- };
+&pcie0 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x8000>;
+ ieee80211-freq-limit = <5000000 6000000>;
};
+};
- pcie1 {
- mt76@1,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x0000>;
- ieee80211-freq-limit = <2400000 2500000>;
- };
+&pcie1 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x0000>;
+ ieee80211-freq-limit = <2400000 2500000>;
};
};
&pcie {
status = "okay";
+};
- pcie-bridge {
- mt76@0,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x8000>;
- };
+&pcie0 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x8000>;
};
};
&pcie {
status = "okay";
+};
- pcie0 {
- mt76@0,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x0000>;
- ieee80211-freq-limit = <2400000 2500000>;
- };
+&pcie0 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x0000>;
+ ieee80211-freq-limit = <2400000 2500000>;
};
+};
- pcie1 {
- mt76@1,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x8000>;
- ieee80211-freq-limit = <5000000 6000000>;
- };
+&pcie1 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x8000>;
+ ieee80211-freq-limit = <5000000 6000000>;
};
};
&pcie {
status = "okay";
+};
- pcie-bridge {
- mt76@0,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x8000>;
- ieee80211-freq-limit = <5000000 6000000>;
- };
+&pcie0 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x8000>;
+ ieee80211-freq-limit = <5000000 6000000>;
};
};
&pcie {
status = "okay";
+};
- pcie0 {
- mt76@0,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x0>;
- };
+&pcie0 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x0>;
};
};
&pcie {
status = "okay";
- pcie-bridge {
- mt76@0,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&art 0x1000>;
- ieee80211-freq-limit = <5000000 6000000>;
- };
+};
+
+&pcie0 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&art 0x1000>;
+ ieee80211-freq-limit = <5000000 6000000>;
};
};
&pcie {
status = "okay";
+};
- pcie0 {
- wifi@14c3,7603 {
- compatible = "pci14c3,7603";
- reg = <0x0000 0 0 0 0>;
- mediatek,mtd-eeprom = <&factory 0x0000>;
- ieee80211-freq-limit = <2400000 2500000>;
- };
+&pcie0 {
+ wifi@0,0 {
+ compatible = "pci14c3,7603";
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x0000>;
+ ieee80211-freq-limit = <2400000 2500000>;
};
+};
- pcie1 {
- wifi@14c3,7662 {
- compatible = "pci14c3,7662";
- reg = <0x0000 0 0 0 0>;
- mediatek,mtd-eeprom = <&factory 0x8000>;
- ieee80211-freq-limit = <5000000 6000000>;
- };
+&pcie1 {
+ wifi@0,0 {
+ compatible = "pci14c3,7662";
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x8000>;
+ ieee80211-freq-limit = <5000000 6000000>;
};
};
&pcie {
status = "okay";
+};
- pcie-bridge {
- mt76@0,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x8000>;
- ieee80211-freq-limit = <5000000 6000000>;
- };
+&pcie0 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x8000>;
+ ieee80211-freq-limit = <5000000 6000000>;
};
};
&pcie {
status = "okay";
+};
- pcie-bridge {
- mt76@0,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x8000>;
- };
+&pcie0 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x8000>;
};
};
&pcie {
status = "okay";
+};
- pcie-bridge {
- mt76@0,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x8000>;
- };
+&pcie0 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x8000>;
};
};
&pcie {
status = "okay";
+};
- pcie0 {
- mt76@0,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x8000>;
- ieee80211-freq-limit = <5000000 6000000>;
- };
+&pcie0 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x8000>;
+ ieee80211-freq-limit = <5000000 6000000>;
};
+};
- pcie1 {
- mt76@1,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x0000>;
- };
+&pcie1 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x0000>;
};
};
&pcie {
status = "okay";
+};
- pcie0 {
- mt76@0,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x8000>;
- ieee80211-freq-limit = <5000000 6000000>;
- };
+&pcie0 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x8000>;
+ ieee80211-freq-limit = <5000000 6000000>;
};
+};
- pcie1 {
- mt76@1,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x0000>;
- };
+&pcie1 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x0000>;
};
};
&pcie {
status = "okay";
+};
- pcie0 {
- mt76@0,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x8000>;
- ieee80211-freq-limit = <5000000 6000000>;
- };
+&pcie0 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x8000>;
+ ieee80211-freq-limit = <5000000 6000000>;
};
+};
- pcie1 {
- mt76@1,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x0000>;
- };
+&pcie1 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x0000>;
};
};
&pcie {
status = "okay";
+};
- pcie-bridge {
- mt76@0,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x8000>;
- ieee80211-freq-limit = <5000000 6000000>;
- };
+&pcie0 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x8000>;
+ ieee80211-freq-limit = <5000000 6000000>;
};
};
&pcie {
status = "okay";
+};
- pcie-bridge {
- mt76@0,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x8000>;
- ieee80211-freq-limit = <5000000 6000000>;
- };
+&pcie0 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x8000>;
+ ieee80211-freq-limit = <5000000 6000000>;
};
};
&pcie {
status = "okay";
+};
- pcie0 {
- mt76@0,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x8000>;
- ieee80211-freq-limit = <5000000 6000000>;
- };
+&pcie0 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x8000>;
+ ieee80211-freq-limit = <5000000 6000000>;
};
+};
- pcie1 {
- mt76@1,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x0000>;
- ieee80211-freq-limit = <2400000 2500000>;
- };
+&pcie1 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x0000>;
+ ieee80211-freq-limit = <2400000 2500000>;
};
};
&pcie {
status = "okay";
+};
- pcie0 {
- mt76@0,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&radio 0>;
- mtd-mac-address = <&config 0x10008>;
- mtd-mac-address-increment = <1>;
- };
+&pcie0 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&radio 0>;
+ mtd-mac-address = <&config 0x10008>;
+ mtd-mac-address-increment = <1>;
};
+};
- pcie1 {
- mt76@1,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&radio 0x8000>;
- ieee80211-freq-limit = <5000000 6000000>;
- mtd-mac-address = <&config 0x10008>;
- mtd-mac-address-increment = <2>;
- };
+&pcie1 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&radio 0x8000>;
+ ieee80211-freq-limit = <5000000 6000000>;
+ mtd-mac-address = <&config 0x10008>;
+ mtd-mac-address-increment = <2>;
};
};
&pcie {
status = "okay";
+};
- pcie0 {
- mt76@0,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x0000>;
- ieee80211-freq-limit = <5000000 6000000>;
- };
+&pcie0 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x0000>;
+ ieee80211-freq-limit = <5000000 6000000>;
};
+};
- pcie1 {
- mt76@1,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x8000>;
- ieee80211-freq-limit = <2400000 2500000>;
- };
+&pcie1 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x8000>;
+ ieee80211-freq-limit = <2400000 2500000>;
};
};
&pcie {
status = "okay";
+};
- pcie-bridge {
- wifi@1814,5592 {
- compatible = "pci1814,5592";
- reg = <0x0000 0 0 0 0>;
- ralink,2ghz = <0>;
- ralink,mtd-eeprom = <&factory 0x8000>;
- };
+&pcie0 {
+ wifi@1814,5592 {
+ compatible = "pci1814,5592";
+ reg = <0x0000 0 0 0 0>;
+ ralink,2ghz = <0>;
+ ralink,mtd-eeprom = <&factory 0x8000>;
};
};
&pci {
status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&pci_pins>;
-
- pci_pins: pci {
- pci {
- ralink,group = "pci";
- ralink,function = "pci-fnc";
- };
- };
+};
- host-bridge {
- pci-bridge@1 {
- status = "okay";
+&pci1 {
+ status = "okay";
- wifi@1814,3091 {
- compatible = "pci1814,3091";
- reg = <0x10000 0 0 0 0>;
- ralink,mtd-eeprom = <&factory 0x8000>;
- };
- };
+ wifi@0,0 {
+ compatible = "pci1814,3091";
+ reg = <0x10000 0 0 0 0>;
+ ralink,mtd-eeprom = <&factory 0x8000>;
};
};
&pcie {
status = "okay";
+};
- pcie0 {
- mt76@0,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x8000>;
- ieee80211-freq-limit = <5000000 6000000>;
- };
+&pcie0 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x8000>;
+ ieee80211-freq-limit = <5000000 6000000>;
};
+};
- pcie1 {
- mt76@1,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x0000>;
- ieee80211-freq-limit = <2400000 2500000>;
- };
+&pcie1 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x0000>;
+ ieee80211-freq-limit = <2400000 2500000>;
};
};
&pcie {
status = "okay";
+};
- pcie0 {
- mt76@0,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x8000>;
- ieee80211-freq-limit = <5000000 6000000>;
- };
+&pcie0 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x8000>;
+ ieee80211-freq-limit = <5000000 6000000>;
};
+};
- pcie1 {
- mt76@1,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x0000>;
- };
+&pcie1 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x0000>;
};
};
&pci {
status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&pci_pins>;
-
- pci_pins: pci {
- pci {
- ralink,group = "pci";
- ralink,function = "pci-fnc";
- };
- };
+};
- host-bridge {
- pci-bridge@1 {
- status = "okay";
+&pci1 {
+ status = "okay";
- wifi@0,0 {
- compatible = "pci0,0";
- reg = < 0x10000 0 0 0 0 >;
- ralink,2ghz = <0>;
- };
- };
+ wifi@0,0 {
+ compatible = "pci0,0";
+ reg = < 0x10000 0 0 0 0 >;
+ ralink,2ghz = <0>;
};
};
&pcie {
status = "okay";
+};
- pcie-bridge {
- mt76@1,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x28000>;
- ieee80211-freq-limit = <5000000 6000000>;
- mtd-mac-address = <&factory 0xf100>;
- mtd-mac-address-increment = <(-1)>;
- };
+&pcie0 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x28000>;
+ ieee80211-freq-limit = <5000000 6000000>;
+ mtd-mac-address = <&factory 0xf100>;
+ mtd-mac-address-increment = <(-1)>;
};
};
led-status = &led_status;
};
- pci@440000 {
- status = "okay";
-
- host-bridge {
- pci-bridge@1 {
- status = "okay";
- };
- };
- };
-
nor-flash@1c000000 {
compatible = "cfi-flash";
reg = <0x1c000000 0x800000>;
status = "okay";
};
+&pci {
+ status = "okay";
+};
+
&wmac {
ralink,mtd-eeprom = <&factory 0>;
};
&pcie {
status = "okay";
+};
- pcie0 {
- wifi@14c3,7603 {
- compatible = "pci14c3,7603";
- reg = <0x0000 0 0 0 0>;
- mediatek,mtd-eeprom = <&factory 0x0000>;
- };
+&pcie0 {
+ wifi@0,0 {
+ compatible = "pci14c3,7603";
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x0000>;
};
+};
- pcie1 {
- wifi@14c3,7662 {
- compatible = "pci14c3,7662";
- reg = <0x0000 0 0 0 0>;
- mediatek,mtd-eeprom = <&factory 0x8000>;
- ieee80211-freq-limit = <5000000 6000000>;
- };
+&pcie1 {
+ wifi@0,0 {
+ compatible = "pci14c3,7662";
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x8000>;
+ ieee80211-freq-limit = <5000000 6000000>;
};
};
&pcie {
status = "okay";
- pcie-bridge {
- mt76@0,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x8000>;
- ieee80211-freq-limit = <5000000 6000000>;
- };
+};
+
+&pcie0 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x8000>;
+ ieee80211-freq-limit = <5000000 6000000>;
};
};
&pcie {
status = "okay";
- pcie-bridge {
- wifi@14c3,7662 {
- compatible = "pci14c3,7662";
- reg = <0x0000 0 0 0 0>;
- mediatek,mtd-eeprom = <&factory 0x8000>;
- ieee80211-freq-limit = <5000000 6000000>;
- };
+};
+
+&pcie0 {
+ wifi@14c3,7662 {
+ compatible = "pci14c3,7662";
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x8000>;
+ ieee80211-freq-limit = <5000000 6000000>;
};
};
&pcie {
status = "okay";
+};
- pcie0 {
- mt76@0,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x8000>;
- ieee80211-freq-limit = <5000000 6000000>;
- };
+&pcie0 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x8000>;
+ ieee80211-freq-limit = <5000000 6000000>;
};
+};
- pcie1 {
- mt76@1,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x0000>;
- ieee80211-freq-limit = <2400000 2500000>;
- };
+&pcie1 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x0000>;
+ ieee80211-freq-limit = <2400000 2500000>;
};
};
&pcie {
status = "okay";
+};
- pcie-bridge {
- wifi@0,0 {
- compatible = "pci0,0";
- reg = <0x0000 0 0 0 0>;
- mediatek,mtd-eeprom = <&factory 0x8000>;
- ieee80211-freq-limit = <5000000 6000000>;
- };
+&pcie0 {
+ wifi@0,0 {
+ compatible = "pci0,0";
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x8000>;
+ ieee80211-freq-limit = <5000000 6000000>;
};
};
&pcie {
status = "okay";
+};
- pcie-bridge {
- wifi@1814,5592 {
- compatible = "pci1814,5592";
- reg = <0x0000 0 0 0 0>;
- ralink,mtd-eeprom = <&factory 0x8000>;
- };
+&pcie0 {
+ wifi@1814,5592 {
+ compatible = "pci1814,5592";
+ reg = <0x0000 0 0 0 0>;
+ ralink,mtd-eeprom = <&factory 0x8000>;
};
};
&pcie {
status = "okay";
+};
- pcie0 {
- mt76@0,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x8000>;
- ieee80211-freq-limit = <5000000 6000000>;
- mtd-mac-address = <&factory 0xe000>;
- };
+&pcie0 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x8000>;
+ ieee80211-freq-limit = <5000000 6000000>;
+ mtd-mac-address = <&factory 0xe000>;
};
+};
- pcie1 {
- mt76@1,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x0000>;
- ieee80211-freq-limit = <2400000 2500000>;
- mtd-mac-address = <&factory 0xe000>;
- };
+&pcie1 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x0000>;
+ ieee80211-freq-limit = <2400000 2500000>;
+ mtd-mac-address = <&factory 0xe000>;
};
};
&pcie {
status = "okay";
- pcie-bridge {
- mt76@0,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x8000>;
- ieee80211-freq-limit = <5000000 6000000>;
- };
+};
+
+&pcie0 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x8000>;
+ ieee80211-freq-limit = <5000000 6000000>;
};
};
&pci {
status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&pci_pins>;
-
- pci_pins: pci {
- pci {
- ralink,group = "pci";
- ralink,function = "pci-fnc";
- };
- };
+};
- host-bridge {
- pci-bridge@1 {
- status = "okay";
+&pci1 {
+ status = "okay";
- wifi@1814,3091 {
- compatible = "pci1814,3091";
- reg = <0x10000 0 0 0 0>;
- ralink,mtd-eeprom = <&factory 0x8000>;
- };
- };
+ wifi@0,0 {
+ compatible = "pci1814,3091";
+ reg = <0x10000 0 0 0 0>;
+ ralink,mtd-eeprom = <&factory 0x8000>;
};
};
&pcie {
status = "okay";
+};
- pcie0 {
- mt76@0,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&iNIC_rf 0x0>;
- };
+&pcie0 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&iNIC_rf 0x0>;
};
+};
- pcie1 {
- mt76@1,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&Factory 0x0>;
- ieee80211-freq-limit = <5000000 6000000>;
- };
+&pcie1 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&Factory 0x0>;
+ ieee80211-freq-limit = <5000000 6000000>;
};
};
&pcie {
status = "okay";
+};
- pcie0 {
- mt76@0,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&Factory 0x0>;
- };
+&pcie0 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&Factory 0x0>;
};
};
&pcie {
status = "okay";
+};
- pcie0 {
- mt76@0,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x8000>;
- ieee80211-freq-limit = <5000000 6000000>;
- };
+&pcie0 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x8000>;
+ ieee80211-freq-limit = <5000000 6000000>;
};
+};
- pcie1 {
- mt76@1,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x0000>;
- };
+&pcie1 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x0000>;
};
};
&pcie {
status = "okay";
+};
- pcie0 {
- mt76@0,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x0000>;
- };
+&pcie0 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x0000>;
};
+};
+
+&pcie1 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x8000>;
+ ieee80211-freq-limit = <5000000 6000000>;
- pcie1 {
- mt76@1,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x8000>;
- ieee80211-freq-limit = <5000000 6000000>;
-
- led {
- led-sources = <2>;
- led-active-low;
- };
+ led {
+ led-sources = <2>;
+ led-active-low;
};
};
};
&pcie {
status = "okay";
+};
- pcie0 {
- mt76@0,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x8000>;
- ieee80211-freq-limit = <5000000 6000000>;
- };
+&pcie0 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x8000>;
+ ieee80211-freq-limit = <5000000 6000000>;
};
+};
- pcie1 {
- mt76@1,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x0000>;
- };
+&pcie1 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x0000>;
};
};
&pcie {
status = "okay";
+};
- pcie0 {
- rt5592@0,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- ralink,mtd-eeprom = <&factory 0x8000>;
- };
+&pcie0 {
+ rt5592@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ ralink,mtd-eeprom = <&factory 0x8000>;
};
+};
- pcie1 {
- mt76@1,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x0000>;
- };
+&pcie1 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x0000>;
};
};
led-status = &led_router;
};
- pci@440000 {
- status = "ok";
- };
-
cfi@1f000000 {
compatible = "cfi-flash";
reg = <0x1f000000 0x800000>;
};
};
+&pci {
+ status = "okay";
+};
+
&wmac {
ralink,mtd-eeprom = <&factory 0>;
};
&pcie {
status = "okay";
+};
- pcie-bridge {
- mt76@0,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x8000>;
- ieee80211-freq-limit = <5000000 6000000>;
- };
+&pcie0 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x8000>;
+ ieee80211-freq-limit = <5000000 6000000>;
};
};
&pcie {
status = "okay";
+};
- pcie-bridge {
- mt76@0,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x8000>;
- ieee80211-freq-limit = <5000000 6000000>;
- };
+&pcie0 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x8000>;
+ ieee80211-freq-limit = <5000000 6000000>;
};
};
&pcie {
status = "okay";
+};
- pcie0 {
- mt76@0,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x8000>;
- ieee80211-freq-limit = <5000000 6000000>;
- };
+&pcie0 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x8000>;
+ ieee80211-freq-limit = <5000000 6000000>;
};
+};
- pcie1 {
- mt76@1,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x0000>;
- ieee80211-freq-limit = <2400000 2500000>;
- };
+&pcie1 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x0000>;
+ ieee80211-freq-limit = <2400000 2500000>;
};
};
&pcie {
status = "okay";
+};
- pcie0 {
- wifi@14c3,7662 {
- compatible = "pci14c3,7662";
- reg = <0x0000 0 0 0 0>;
- mediatek,mtd-eeprom = <&factory 0x8000>;
- ieee80211-freq-limit = <5000000 6000000>;
+&pcie0 {
+ wifi@0,0 {
+ compatible = "pci14c3,7662";
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x8000>;
+ ieee80211-freq-limit = <5000000 6000000>;
- led {
- led-sources = <2>;
- };
+ led {
+ led-sources = <2>;
};
};
+};
- pcie1 {
- wifi@14c3,7603 {
- compatible = "pci14c3,7603";
- reg = <0x0000 0 0 0 0>;
- mediatek,mtd-eeprom = <&factory 0x0000>;
- };
+&pcie1 {
+ wifi@0,0 {
+ compatible = "pci14c3,7603";
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x0000>;
};
};
&pcie {
status = "okay";
+};
- pcie0 {
- mt76@0,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x8000>;
- ieee80211-freq-limit = <5000000 6000000>;
- };
+&pcie0 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x8000>;
+ ieee80211-freq-limit = <5000000 6000000>;
};
+};
- pcie1 {
- mt76@1,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x0000>;
- ieee80211-freq-limit = <2400000 2500000>;
- };
+&pcie1 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x0000>;
+ ieee80211-freq-limit = <2400000 2500000>;
};
};
&pcie {
status = "okay";
+};
- pcie0 {
- wifi@14c3,7603 {
- compatible = "pci14c3,7603";
- reg = <0x0000 0 0 0 0>;
- mediatek,mtd-eeprom = <&factory 0x0000>;
- };
+&pcie0 {
+ wifi@0,0 {
+ compatible = "pci14c3,7603";
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x0000>;
};
+};
- pcie1 {
- wifi@14c3,7662 {
- compatible = "pci14c3,7662";
- reg = <0x0000 0 0 0 0>;
- mediatek,mtd-eeprom = <&factory 0x8000>;
- ieee80211-freq-limit = <5000000 6000000>;
- };
+&pcie1 {
+ wifi@0,0 {
+ compatible = "pci14c3,7662";
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x8000>;
+ ieee80211-freq-limit = <5000000 6000000>;
};
};
&pcie {
status = "okay";
+};
- pcie-bridge {
- mt76@0,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&factory 0x8000>;
- ieee80211-freq-limit = <5000000 6000000>;
- mtd-mac-address = <&factory 0x8004>;
- };
+&pcie0 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x8000>;
+ ieee80211-freq-limit = <5000000 6000000>;
+ mtd-mac-address = <&factory 0x8004>;
};
};
status = "disabled";
- pcie-bridge {
+ pcie0: pcie@0,0 {
reg = <0x0000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
+
+ ranges;
};
};
clocks = <&clkctrl 24 &clkctrl 25 &clkctrl 26>;
clock-names = "pcie0", "pcie1", "pcie2";
- pcie0 {
+ pcie0: pcie@0,0 {
reg = <0x0000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
+
+ ranges;
};
- pcie1 {
+ pcie1: pcie@1,0 {
reg = <0x0800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
+
+ ranges;
};
- pcie2 {
+ pcie2: pcie@2,0 {
reg = <0x1000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
+
+ ranges;
};
};
};
0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
>;
- pcie-bridge {
+ pcie0: pcie@0,0 {
reg = <0x0000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
+
+ ranges;
};
};
ralink,function = "uartlite";
};
};
+
+ pci_pins: pci {
+ pci {
+ ralink,group = "pci";
+ ralink,function = "pci-fnc";
+ };
+ };
};
ethernet: ethernet@10100000 {
#size-cells = <1>;
ranges; /* direct mapping */
+ pinctrl-names = "default";
+ pinctrl-0 = <&pci_pins>;
+
status = "disabled";
pciintc: interrupt-controller {
interrupts = <4>;
};
- host-bridge {
+ pci@0 {
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
0x9000 0 0 4 &pciintc 19
>;
- pci-bridge@1 {
+ pci1: pci@1 {
reg = <0x0800 0 0 0 0>;
device_type = "pci";
#interrupt-cells = <1>;
status = "disabled";
- ralink,pci-slot = <1>;
-
interrupt-map-mask = <0x0 0 0 0>;
interrupt-map = <0x0 0 0 0 &pciintc 20>;
+
+ bus-range = <1 255>;
+ ranges;
};
- pci-slot@17 {
+ pci17: pci@11,0 {
reg = <0x8800 0 0 0 0>;
- device_type = "pci";
#interrupt-cells = <1>;
#address-cells = <3>;
#size-cells = <2>;
- ralink,pci-slot = <17>;
-
status = "disabled";
};
- pci-slot@18 {
+ pci18: pci@12,0 {
reg = <0x9000 0 0 0 0>;
- device_type = "pci";
#interrupt-cells = <1>;
#address-cells = <3>;
#size-cells = <2>;
- ralink,pci-slot = <18>;
-
status = "disabled";
};
};