[media] dt: binding: add binding for ImgTec IR block
authorJames Hogan <james.hogan@imgtec.com>
Fri, 28 Feb 2014 23:28:51 +0000 (20:28 -0300)
committerMauro Carvalho Chehab <m.chehab@samsung.com>
Tue, 11 Mar 2014 18:08:51 +0000 (15:08 -0300)
Add device tree binding for ImgTec Consumer Infrared block, specifically
major revision 1 of the hardware.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Documentation/devicetree/bindings/media/img-ir-rev1.txt [new file with mode: 0644]

diff --git a/Documentation/devicetree/bindings/media/img-ir-rev1.txt b/Documentation/devicetree/bindings/media/img-ir-rev1.txt
new file mode 100644 (file)
index 0000000..5434ce6
--- /dev/null
@@ -0,0 +1,34 @@
+* ImgTec Infrared (IR) decoder version 1
+
+This binding is for Imagination Technologies' Infrared decoder block,
+specifically major revision 1.
+
+Required properties:
+- compatible:          Should be "img,ir-rev1"
+- reg:                 Physical base address of the controller and length of
+                       memory mapped region.
+- interrupts:          The interrupt specifier to the cpu.
+
+Optional properties:
+- clocks:              List of clock specifiers as described in standard
+                       clock bindings.
+                       Up to 3 clocks may be specified in the following order:
+                       1st:    Core clock (defaults to 32.768KHz if omitted).
+                       2nd:    System side (fast) clock.
+                       3rd:    Power modulation clock.
+- clock-names:         List of clock names corresponding to the clocks
+                       specified in the clocks property.
+                       Accepted clock names are:
+                       "core": Core clock.
+                       "sys":  System clock.
+                       "mod":  Power modulation clock.
+
+Example:
+
+       ir@02006200 {
+               compatible = "img,ir-rev1";
+               reg = <0x02006200 0x100>;
+               interrupts = <29 4>;
+               clocks = <&clk_32khz>;
+               clock-names =  "core";
+       };