/*
- * (C) Copyright 2004
- * Robert Whaley, Applied Data Systems, Inc. rwhaley@applieddata.net
+ * Voipac PXA270 Support
*
- * (C) Copyright 2002
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
+ * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
DECLARE_GLOBAL_DATA_PTR;
-/* ------------------------------------------------------------------------- */
-
/*
* Miscelaneous platform dependent initialisations
*/
-extern struct serial_device serial_ffuart_device;
-extern struct serial_device serial_btuart_device;
-extern struct serial_device serial_stuart_device;
-
-struct serial_device *default_serial_console (void)
-{
- return &serial_ffuart_device;
-}
-
-int board_init (void)
+int board_init(void)
{
/* memory and cpu-speed are setup before relocation */
/* so we do _nothing_ here */
- /* arch number of vpac270 */
+ /* Arch number of vpac270 */
gd->bd->bi_arch_number = MACH_TYPE_VPAC270;
/* adress of boot parameters */
return 0;
}
-int dram_init (void)
+struct serial_device *default_serial_console(void)
{
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
+ return &serial_ffuart_device;
+}
+int dram_init(void)
+{
+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
- gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
+#ifdef CONFIG_256M_U_BOOT
+ gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
+ gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
+#endif
return 0;
}
+#ifdef CONFIG_CMD_USB
int usb_board_init(void)
{
writel((UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
return;
}
+#endif
#ifdef CONFIG_DRIVER_DM9000
int board_eth_init(bd_t *bis)
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* MA 02111-1307 USA
*/
-#ifndef __CONFIG_H
-#define __CONFIG_H
+#ifndef __CONFIG_H
+#define __CONFIG_H
/*
* High Level Board Configuration Options
#define CONFIG_PXA27X 1 /* Marvell PXA270 CPU */
#define CONFIG_VPAC270 1 /* Voipac PXA270 board */
-#undef BOARD_LATE_INIT
-#undef CONFIG_SKIP_RELOCATE_UBOOT
-#undef CONFIG_USE_IRQ
-#undef CONFIG_SKIP_LOWLEVEL_INIT
-
/*
* Environment settings
*/
-#define CONFIG_ENV_SIZE 0x4000
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
+#define CONFIG_ENV_OVERWRITE
+#define CONFIG_SYS_MALLOC_LEN (128*1024)
#define CONFIG_SYS_GBL_DATA_SIZE 128
-#define CONFIG_ENV_OVERWRITE /* override default environment */
-
#define CONFIG_BOOTCOMMAND \
"if mmc init && fatload mmc 0 0xa4000000 uImage; then " \
"bootm 0xa4000000; " \
"if usb reset && fatload usb 0 0xa4000000 uImage; then " \
"bootm 0xa4000000; " \
"fi; " \
+ "if ide reset && fatload ide 0 0xa4000000 uImage; then " \
+ "bootm 0xa4000000; " \
+ "fi; " \
"bootm 0x40000;"
#define CONFIG_BOOTARGS "console=tty0 console=ttyS0,115200"
#define CONFIG_TIMESTAMP
#define CONFIG_NET_MULTI 1
#define CONFIG_DRIVER_DM9000 1
-#define CONFIG_DM9000_BASE 0x08000300 /* CS2 */
-#define DM9000_IO (CONFIG_DM9000_BASE)
-#define DM9000_DATA (CONFIG_DM9000_BASE + 4)
+#define CONFIG_DM9000_BASE 0x08000300 /* CS2 */
+#define DM9000_IO (CONFIG_DM9000_BASE)
+#define DM9000_DATA (CONFIG_DM9000_BASE + 4)
#define CONFIG_NET_RETRY_COUNT 10
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_PXA_MMC
#define CONFIG_SYS_MMC_BASE 0xF0000000
#define CONFIG_CMD_FAT
+#define CONFIG_CMD_EXT2
#define CONFIG_DOS_PARTITION
#endif
* KGDB
*/
#ifdef CONFIG_CMD_KGDB
-#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
-#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
+#define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port speed */
+#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
/*
#define CONFIG_SYS_HUSH_PARSER 1
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
+#define CONFIG_SYS_LONGHELP
#ifdef CONFIG_SYS_HUSH_PARSER
-#define CONFIG_SYS_PROMPT "$ " /* Monitor Command Prompt */
+#define CONFIG_SYS_PROMPT "$ "
#else
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
+#define CONFIG_SYS_PROMPT "=> "
#endif
-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
+#define CONFIG_SYS_CBSIZE 256
+#define CONFIG_SYS_PBSIZE \
+ (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
+#define CONFIG_SYS_MAXARGS 16
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define CONFIG_SYS_DEVICE_NULLDEV 1
/*
*/
#undef CONFIG_SYS_CLKS_IN_HZ
#define CONFIG_SYS_HZ 3250000 /* Timer @ 3250000 Hz */
-#define CONFIG_SYS_CPUSPEED 0x190 /* standard setting for 312MHz; L=16, N=1.5, A=0, SDCLK!=SystemBus */
+#define CONFIG_SYS_CPUSPEED 0x190 /* 312MHz */
/*
* Stack sizes
- *
- * The stack sizes are set up in start.S using the settings below
*/
#define CONFIG_STACKSIZE (128*1024) /* regular stack */
#ifdef CONFIG_USE_IRQ
/*
* DRAM Map
*/
-#define CONFIG_NR_DRAM_BANKS 2 /* We have 2 banks of DRAM */
+#define CONFIG_NR_DRAM_BANKS 2 /* 2 banks of DRAM */
#define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */
#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
+
+#ifdef CONFIG_256M_U_BOOT
#define PHYS_SDRAM_2 0x80000000 /* SDRAM Bank #2 */
#define PHYS_SDRAM_2_SIZE 0x08000000 /* 128 MB */
+#endif
#define CONFIG_SYS_DRAM_BASE 0xa0000000 /* CS0 */
+#ifdef CONFIG_256M_U_BOOT
#define CONFIG_SYS_DRAM_SIZE 0x10000000 /* 256 MB DRAM */
+#else
+#define CONFIG_SYS_DRAM_SIZE 0x08000000 /* 128 MB DRAM */
+#endif
-#define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */
+#define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */
+#define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */
#define CONFIG_SYS_LOAD_ADDR (0x5c000000)
*/
#if defined(CONFIG_CMD_FLASH) /* NOR */
#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
+
+#ifdef CONFIG_256M_U_BOOT
#define PHYS_FLASH_2 0x02000000 /* Flash Bank #2 */
+#endif
#define CONFIG_SYS_FLASH_CFI
#define CONFIG_FLASH_CFI_DRIVER 1
#define CONFIG_SYS_MAX_FLASH_SECT (4 + 255)
+#ifdef CONFIG_256M_U_BOOT
#define CONFIG_SYS_MAX_FLASH_BANKS 2
#define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, PHYS_FLASH_2 }
+#else
+#define CONFIG_SYS_MAX_FLASH_BANKS 1
+#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
+#endif
#define CONFIG_SYS_FLASH_ERASE_TOUT (25*CONFIG_SYS_HZ)
#define CONFIG_SYS_FLASH_WRITE_TOUT (25*CONFIG_SYS_HZ)
#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
#define CONFIG_SYS_FLASH_PROTECTION 1
-#define CONFIG_ENV_IS_IN_FLASH 1
+#define CONFIG_ENV_IS_IN_FLASH 1
+#define CONFIG_ENV_SECT_SIZE 0x4000
#elif defined(CONFIG_CMD_ONENAND) /* OneNAND */
#define CONFIG_SYS_NO_FLASH
#define CONFIG_SYS_ONENAND_BASE 0x00000000
+
#define CONFIG_ENV_IS_IN_ONENAND 1
+#define CONFIG_ENV_SECT_SIZE 0x20000
#else /* No flash */
#define CONFIG_SYS_NO_FLASH
#define CONFIG_SYS_ENV_IS_NOWHERE
#endif
-#define CONFIG_SYS_MONITOR_BASE 0x000000
+#define CONFIG_SYS_MONITOR_BASE 0x0
#define CONFIG_SYS_MONITOR_LEN 0x40000
-#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_LEN)
-#define CONFIG_ENV_SECT_SIZE 0x40000
-#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
-#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
+#define CONFIG_ENV_ADDR 0x40000
+#define CONFIG_ENV_SIZE 0x4000
/*
* IDE
#define __io
-#define CONFIG_SYS_IDE_MAXBUS 1
-#define CONFIG_SYS_IDE_MAXDEVICE 1
+#define CONFIG_SYS_IDE_MAXBUS 1
+#define CONFIG_SYS_IDE_MAXDEVICE 1
-#define CONFIG_SYS_ATA_BASE_ADDR 0x0c000000
-#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0
+#define CONFIG_SYS_ATA_BASE_ADDR 0x0c000000
+#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0
-#define CONFIG_SYS_ATA_DATA_OFFSET 0x120
-#define CONFIG_SYS_ATA_REG_OFFSET 0x120
-#define CONFIG_SYS_ATA_ALT_OFFSET 0x120
+#define CONFIG_SYS_ATA_DATA_OFFSET 0x120
+#define CONFIG_SYS_ATA_REG_OFFSET 0x120
+#define CONFIG_SYS_ATA_ALT_OFFSET 0x120
#define CONFIG_SYS_ATA_STRIDE 2
#endif
#define CONFIG_SYS_MSC0_VAL 0x3ffc95fa
#define CONFIG_SYS_MSC1_VAL 0x02ccf974
#define CONFIG_SYS_MSC2_VAL 0x00000000
+#ifdef CONFIG_256M_U_BOOT
#define CONFIG_SYS_MDCNFG_VAL 0x8ad30ad3
+#else
+#define CONFIG_SYS_MDCNFG_VAL 0x88000ad3
+#endif
#define CONFIG_SYS_MDREFR_VAL 0x201fe01e
#define CONFIG_SYS_MDMRS_VAL 0x00000000
#define CONFIG_SYS_FLYCNFG_VAL 0x00000000
* LCD
*/
#ifdef CONFIG_LCD
-#define CONFIG_VOIPAC_LCD
+#define CONFIG_VOIPAC_LCD
#endif
/*
* USB
*/
-#ifdef CONFIG_CMD_USB
+#ifdef CONFIG_CMD_USB
#define CONFIG_USB_OHCI_NEW
#define CONFIG_SYS_USB_OHCI_CPU_INIT
#define CONFIG_SYS_USB_OHCI_BOARD_INIT