driver/i2c/mxc: Enable I2C bus 3 and 4
authorYork Sun <yorksun@freescale.com>
Fri, 20 Mar 2015 17:20:40 +0000 (10:20 -0700)
committerYork Sun <yorksun@freescale.com>
Thu, 23 Apr 2015 15:55:53 +0000 (08:55 -0700)
Some SoCs have more than two I2C busses. Instead of adding ifdef
to the driver, macros are put into board header file where
CONFIG_SYS_I2C_MXC is defined.

Signed-off-by: York Sun <yorksun@freescale.com>
CC: Heiko Schocher <hs@denx.de>
30 files changed:
README
drivers/i2c/mxc_i2c.c
include/configs/aristainetos.h
include/configs/cm_fx6.h
include/configs/embestmx6boards.h
include/configs/flea3.h
include/configs/gw_ventana.h
include/configs/imx31_phycore.h
include/configs/ls1021aqds.h
include/configs/ls1021atwr.h
include/configs/ls2085a_common.h
include/configs/m53evk.h
include/configs/mx35pdk.h
include/configs/mx53ard.h
include/configs/mx53evk.h
include/configs/mx53loco.h
include/configs/mx53smd.h
include/configs/mx6qsabreauto.h
include/configs/mx6sabresd.h
include/configs/mx6slevk.h
include/configs/mx6sxsabresd.h
include/configs/nitrogen6x.h
include/configs/novena.h
include/configs/ot1200.h
include/configs/platinum.h
include/configs/tbs2910.h
include/configs/titanium.h
include/configs/tqma6.h
include/configs/wandboard.h
include/configs/woodburn_common.h

diff --git a/README b/README
index fc1fd52f53053268fe3bdb4d7040dffc855a53f4..d33f3b5fef91e7bfde103308bbc8d5ed7f7a77fe 100644 (file)
--- a/README
+++ b/README
@@ -2395,6 +2395,8 @@ CBFS (Coreboot Filesystem) support
                  - define slave for bus 3 with CONFIG_SYS_MXC_I2C3_SLAVE
                If those defines are not set, default value is 100000
                for speed, and 0 for slave.
+                 - enable bus 3 with CONFIG_SYS_I2C_MXC_I2C3
+                 - enable bus 4 with CONFIG_SYS_I2C_MXC_I2C4
 
                - drivers/i2c/rcar_i2c.c:
                  - activate this driver with CONFIG_SYS_I2C_RCAR
index fc5ee35a1ad9ec421de06ae6ba854289eac0bc52..42782cb1ace611779cd745ee3077af0165ed1d09 100644 (file)
@@ -114,6 +114,9 @@ static u16 i2c_clk_div[50][2] = {
 #ifndef CONFIG_SYS_MXC_I2C3_SPEED
 #define CONFIG_SYS_MXC_I2C3_SPEED 100000
 #endif
+#ifndef CONFIG_SYS_MXC_I2C4_SPEED
+#define CONFIG_SYS_MXC_I2C4_SPEED 100000
+#endif
 
 #ifndef CONFIG_SYS_MXC_I2C1_SLAVE
 #define CONFIG_SYS_MXC_I2C1_SLAVE 0
@@ -124,6 +127,9 @@ static u16 i2c_clk_div[50][2] = {
 #ifndef CONFIG_SYS_MXC_I2C3_SLAVE
 #define CONFIG_SYS_MXC_I2C3_SLAVE 0
 #endif
+#ifndef CONFIG_SYS_MXC_I2C4_SLAVE
+#define CONFIG_SYS_MXC_I2C4_SLAVE 0
+#endif
 
 
 /*
@@ -543,12 +549,17 @@ U_BOOT_I2C_ADAP_COMPLETE(mxc1, mxc_i2c_init, mxc_i2c_probe,
                         mxc_i2c_set_bus_speed,
                         CONFIG_SYS_MXC_I2C2_SPEED,
                         CONFIG_SYS_MXC_I2C2_SLAVE, 1)
-#if defined(CONFIG_MX31) || defined(CONFIG_MX35) ||\
-       defined(CONFIG_MX51) || defined(CONFIG_MX53) ||\
-       defined(CONFIG_MX6) || defined(CONFIG_LS102XA)
+#ifdef CONFIG_SYS_I2C_MXC_I2C3
 U_BOOT_I2C_ADAP_COMPLETE(mxc2, mxc_i2c_init, mxc_i2c_probe,
                         mxc_i2c_read, mxc_i2c_write,
                         mxc_i2c_set_bus_speed,
                         CONFIG_SYS_MXC_I2C3_SPEED,
                         CONFIG_SYS_MXC_I2C3_SLAVE, 2)
 #endif
+#ifdef CONFIG_SYS_I2C_MXC_I2C4
+U_BOOT_I2C_ADAP_COMPLETE(mxc3, mxc_i2c_init, mxc_i2c_probe,
+                        mxc_i2c_read, mxc_i2c_write,
+                        mxc_i2c_set_bus_speed,
+                        CONFIG_SYS_MXC_I2C4_SPEED,
+                        CONFIG_SYS_MXC_I2C4_SLAVE, 3)
+#endif
index 3066fd030e4163e8798793a207515e1b2f5fe91b..cc2679077630dc1c7e72822b5ffbad8807a8da0c 100644 (file)
 #define CONFIG_CMD_I2C
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C3                /* enable I2C bus 3 */
 #define CONFIG_SYS_I2C_SPEED           100000
 #define CONFIG_SYS_I2C_SLAVE           0x7f
 #define CONFIG_SYS_I2C_NOPROBES                { {0, 0x00} }
index 4207504464d0679a0425f1a7cddfc675e86c3189..d6e5a2b2435f71c00d09aef61597afb899545e8b 100644 (file)
 #define CONFIG_CMD_I2C
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C3                /* enable I2C bus 3 */
 #define CONFIG_SYS_I2C_SPEED           100000
 #define CONFIG_SYS_MXC_I2C3_SPEED      400000
 
index b4b3ae842f75b6aa71b8e15781db7ebf5a8afc2c..e9f5bed9ffc27637ecd4b42454076e6a61330d31 100644 (file)
@@ -55,6 +55,7 @@
 #define CONFIG_CMD_I2C
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C3                /* enable I2C bus 3 */
 #define CONFIG_SYS_I2C_SPEED           100000
 
 /* USB Configs */
index 854ae90bd4a6edcb70e033d8f0544a5ae93379a9..5f7cad83463d870d2132aa919fd5c1b5d423bae8 100644 (file)
@@ -52,6 +52,7 @@
  */
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C3                /* enable I2C bus 3 */
 #define CONFIG_SYS_SPD_BUS_NUM         2 /* I2C3 */
 #define CONFIG_SYS_MXC_I2C3_SLAVE      0xfe
 #define CONFIG_MXC_SPI
index 620f9501d255741c921d699713fd779a3e9b4774..9bc325003aa947498bb67443559362956b7196bd 100644 (file)
@@ -95,6 +95,7 @@
 #define CONFIG_CMD_I2C
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C3                /* enable I2C bus 3 */
 #define CONFIG_SYS_I2C_SPEED           100000
 #define CONFIG_I2C_GSC                 0
 #define CONFIG_I2C_PMIC                        1
index 49039d6dfb8d6827382bb0201a57d7cc5b23a437..db197f340ce788914249ada312a61c47564b8492 100644 (file)
@@ -38,6 +38,7 @@
 
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C3                /* enable I2C bus 3 */
 #define CONFIG_SYS_I2C_CLK_OFFSET      I2C2_CLK_OFFSET
 
 #define CONFIG_MXC_UART
index 8525ce8887025ce4f72d12c2c8f196927499ee5c..9a8fd5007ee4fe40cb6fcadb95f5b5f4f68d22ec 100644 (file)
@@ -389,6 +389,7 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_CMD_I2C
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C3                /* enable I2C bus 3 */
 
 /*
  * I2C bus multiplexer
index a13876b5501fd2dd081deb441de875cda9b241a6..729205f7129573198f8ff259d36b40f83866465b 100644 (file)
 #define CONFIG_CMD_I2C
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C3                /* enable I2C bus 3 */
 
 /* EEPROM */
 #ifndef CONFIG_SD_BOOT
index aca7301ae171ae4e37de4f048b2bcfaf90a7be09..26ef32a17768f811c2a6e2574620610f160e5f12 100644 (file)
@@ -84,6 +84,8 @@
 #define CONFIG_CMD_I2C
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C3                /* enable I2C bus 3 */
+#define CONFIG_SYS_I2C_MXC_I2C4                /* enable I2C bus 4 */
 #define CONFIG_SYS_MXC_I2C1_SPEED      40000000
 #define CONFIG_SYS_MXC_I2C2_SPEED      40000000
 
index c133ba9d03f504eda7b7329abd1093fcb32388b5..c348d38c325ba309074a1e73e1348cf779bb1dd1 100644 (file)
 #ifdef CONFIG_CMD_I2C
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C3                /* enable I2C bus 3 */
 #define CONFIG_SYS_RTC_BUS_NUM         1 /* I2C2 */
 #endif
 
index f8cd39d74dd01b9af7ae962c3b69077faf228fc8..244a9ab56b94f0a861a8c5eac6e123436c1421b5 100644 (file)
@@ -42,6 +42,7 @@
  */
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C3                /* enable I2C bus 3 */
 #define CONFIG_MXC_SPI
 #define CONFIG_MXC_GPIO
 
index 9b003fc4e6d83dca69e043a857b7ae1197ba5e2f..7c3dc20bc3cfdc16a6f9c115a6763e1e7038cd2d 100644 (file)
@@ -48,6 +48,7 @@
 #define CONFIG_CMD_I2C
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C3                /* enable I2C bus 3 */
 
 /* MMC Configs */
 #define CONFIG_FSL_ESDHC
index fb2072d2f0f49b7fb2a7ee79e725a0dd20db0187..22a9fc4bab1ac5c30b6bced1414596e0f6c3b8d0 100644 (file)
@@ -41,6 +41,7 @@
 #define CONFIG_CMD_I2C
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C3                /* enable I2C bus 3 */
 
 /* PMIC Configs */
 #define CONFIG_POWER
index 3551e02276db9bb28800f0bfca18304a8470b900..a56e72e271150598ba40681c54972199bf00fd64 100644 (file)
@@ -76,6 +76,7 @@
 /* I2C Configs */
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C3                /* enable I2C bus 3 */
 
 /* PMIC Controller */
 #define CONFIG_POWER
index 3da0ef4bd0b9bc43d6e88fd6e8460ba3a653f8a8..0785491cf1e9f51283dc8cab5ba46776227f77a4 100644 (file)
@@ -38,6 +38,7 @@
 #define CONFIG_CMD_I2C
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C3                /* enable I2C bus 3 */
 
 /* MMC Configs */
 #define CONFIG_FSL_ESDHC
index 51042ca72e54b7b8e2e1084ac2e96ed9da9615ff..22603442d73f79903434584f7c68e7129585c3b1 100644 (file)
@@ -56,6 +56,7 @@
 #define CONFIG_CMD_I2C
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C3                /* enable I2C bus 3 */
 #define CONFIG_SYS_I2C_SPEED           100000
 
 /* NAND flash command */
index 99d9d4d7cfbf5a5c54de344f7fec4ec84c92fa89..dab2fd2ea2b399808580ebd2802cc38a9f383c06 100644 (file)
@@ -52,6 +52,7 @@
 #define CONFIG_CMD_I2C
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C3                /* enable I2C bus 3 */
 #define CONFIG_SYS_I2C_SPEED             100000
 
 /* PMIC */
index dad49f96df4cd75e9eac4eff55c1ec2607597b2a..cd023de287dfee998da09edcca20b2ac663c1e80 100644 (file)
@@ -52,6 +52,7 @@
 #define CONFIG_CMD_I2C
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C3                /* enable I2C bus 3 */
 #define CONFIG_SYS_I2C_SPEED             100000
 
 /* PMIC */
index a29d62f023a0ecd9ba4f4de9a1dc8b6a85058fc1..248303c3211f0bf78a714072280223d8e8f003d9 100644 (file)
 #define CONFIG_CMD_I2C
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C3                /* enable I2C bus 3 */
 #define CONFIG_SYS_I2C_SPEED             100000
 
 /* PMIC */
index 8ef4b733ca43e93fa67fea79d00c271cbff2984b..883d8a771af8117c1f0529f6a09466c13ecdb831 100644 (file)
@@ -63,6 +63,7 @@
 #define CONFIG_CMD_I2C
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C3                /* enable I2C bus 3 */
 #define CONFIG_SYS_I2C_SPEED           100000
 #define CONFIG_I2C_EDID
 
index 3809c6c59b39b3264920b52d633508ea827d54d9..5f834690f3bb0182b4d280a485e68318d3568534 100644 (file)
 /* I2C */
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C3                /* enable I2C bus 3 */
 #define CONFIG_I2C_MULTI_BUS
 #define CONFIG_I2C_MXC
 #define CONFIG_SYS_I2C_SPEED           100000
index 3c60b4f12b9a0735f0d06496abb2e6b64b6dd97d..200f40af31b5348e63b88f440730bfa87d4273ce 100644 (file)
@@ -62,6 +62,7 @@
 #define CONFIG_CMD_I2C
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C3                /* enable I2C bus 3 */
 #define CONFIG_SYS_I2C_SPEED            100000
 
 /* OCOTP Configs */
index 134bb45887aba2f28df53c6cb8838e3abc017fc4..91ffc7c068b5d3f237c965a13396df4a39cee40c 100644 (file)
@@ -62,6 +62,7 @@
 /* I2C config */
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C3                /* enable I2C bus 3 */
 #define CONFIG_SYS_I2C_SPEED                   100000
 
 /* MMC config */
index 7089378c961061fa1db1e68fb9cae31d5f6a7e33..3a88f22bbf03d21e31660511344c7b3e6b7be1f9 100644 (file)
 #ifdef CONFIG_CMD_I2C
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C3                /* enable I2C bus 3 */
 #define CONFIG_SYS_I2C_SPEED           100000
 #define CONFIG_I2C_EDID
 #endif
index f9e00c5b8b7019ed7803288b8306db74a90ba457..320d76cac607292e05e35ead46409101fb7ff5de 100644 (file)
@@ -44,6 +44,7 @@
 #define CONFIG_CMD_I2C
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C3                /* enable I2C bus 3 */
 #define CONFIG_SYS_I2C_SPEED           100000
 
 /* MMC Configs */
index a099687d4636ac4821da9213fe7c58eff8345827..99c5f82aa096f0661d82bad23c711b55951afeb5 100644 (file)
@@ -80,6 +80,7 @@
 #define CONFIG_CMD_I2C
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C3                /* enable I2C bus 3 */
 #define CONFIG_I2C_MULTI_BUS
 #define CONFIG_SYS_I2C_SPEED           100000
 
index b586803916cdb563affd162630ec6786848ae1e3..b2c36148ba8c8071794281c97e073e2a73aa6cc4 100644 (file)
@@ -62,6 +62,7 @@
 #define CONFIG_CMD_I2C
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C3                /* enable I2C bus 3 */
 #define CONFIG_SYS_I2C_SPEED           100000
 
 /* MMC Configuration */
index 48b869268bb283f76bf2d1e31b8e2f8222cf6904..d0895cfdac7a910a9b28a7eeb259733885ddee07 100644 (file)
@@ -47,6 +47,7 @@
  */
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C3                /* enable I2C bus 3 */
 #define CONFIG_SYS_SPD_BUS_NUM         0
 #define CONFIG_MXC_SPI
 #define CONFIG_MXC_GPIO