* @num_irqs: number of irqs in the array
* @clk_names: array of clock names
* @num_clocks: number of clocks in the array
+ * @reg_names: array of register range names
+ * @num_regs: number of register range names in the array
*/
struct hantro_variant {
unsigned int enc_offset;
int num_irqs;
const char *clk_names[HANTRO_MAX_CLOCKS];
int num_clocks;
+ const char * const *reg_names;
+ int num_regs;
};
/**
* @dev: Pointer to device for convenient logging using
* dev_ macros.
* @clocks: Array of clock handles.
- * @base: Mapped address of VPU registers.
+ * @reg_bases: Mapped addresses of VPU registers.
* @enc_base: Mapped address of VPU encoder register for convenience.
* @dec_base: Mapped address of VPU decoder register for convenience.
* @vpu_mutex: Mutex to synchronize V4L2 calls.
struct platform_device *pdev;
struct device *dev;
struct clk_bulk_data clocks[HANTRO_MAX_CLOCKS];
- void __iomem *base;
+ void __iomem **reg_bases;
void __iomem *enc_base;
void __iomem *dec_base;
const struct of_device_id *match;
struct hantro_dev *vpu;
struct resource *res;
+ int num_bases;
int i, ret;
vpu = devm_kzalloc(&pdev->dev, sizeof(*vpu), GFP_KERNEL);
if (ret)
return ret;
- res = platform_get_resource(vpu->pdev, IORESOURCE_MEM, 0);
- vpu->base = devm_ioremap_resource(vpu->dev, res);
- if (IS_ERR(vpu->base))
- return PTR_ERR(vpu->base);
- vpu->enc_base = vpu->base + vpu->variant->enc_offset;
- vpu->dec_base = vpu->base + vpu->variant->dec_offset;
+ num_bases = vpu->variant->num_regs ?: 1;
+ vpu->reg_bases = devm_kcalloc(&pdev->dev, num_bases,
+ sizeof(*vpu->reg_bases), GFP_KERNEL);
+ if (!vpu->reg_bases)
+ return -ENOMEM;
+
+ for (i = 0; i < num_bases; i++) {
+ res = vpu->variant->reg_names ?
+ platform_get_resource_byname(vpu->pdev, IORESOURCE_MEM,
+ vpu->variant->reg_names[i]) :
+ platform_get_resource(vpu->pdev, IORESOURCE_MEM, 0);
+ vpu->reg_bases[i] = devm_ioremap_resource(vpu->dev, res);
+ if (IS_ERR(vpu->reg_bases[i]))
+ return PTR_ERR(vpu->reg_bases[i]);
+ }
+ vpu->enc_base = vpu->reg_bases[0] + vpu->variant->enc_offset;
+ vpu->dec_base = vpu->reg_bases[0] + vpu->variant->dec_offset;
ret = dma_set_coherent_mask(vpu->dev, DMA_BIT_MASK(32));
if (ret) {