#define TOUT_LOOP 100000
-#undef virt_to_bus
-#define virt_to_bus(x) ((unsigned long)x)
+#define virt_to_bus(devno, v) pci_virt_to_mem(devno, (void *) (v))
#define bus_to_phys(devno, a) pci_mem_to_phys(devno, a)
#define mdelay(n) udelay((n)*1000)
struct e1000_eeprom_info *eeprom = &hw->eeprom;
uint32_t eecd, i = 0;
- DEBUGOUT();
+ DEBUGFUNC();
if (e1000_swfw_sync_acquire(hw, E1000_SWFW_EEP_SM))
return -E1000_ERR_SWFW_SYNC;
int32_t ret_val = E1000_SUCCESS;
uint16_t eeprom_size;
- DEBUGOUT();
+ DEBUGFUNC();
switch (hw->mac_type) {
case e1000_82542_rev2_0:
int32_t ret_val;
uint16_t phy_data;
- DEBUGOUT();
+ DEBUGFUNC();
if (hw->phy_reset_disable)
return E1000_SUCCESS;
txp = tx_base + tx_tail;
tx_tail = (tx_tail + 1) % 8;
- txp->buffer_addr = cpu_to_le64(virt_to_bus(packet));
+ txp->buffer_addr = cpu_to_le64(virt_to_bus(hw->pdev, packet));
txp->lower.data = cpu_to_le32(hw->txd_cmd | length);
txp->upper.data = 0;
E1000_WRITE_REG(hw, TDT, tx_tail);
int idx = 0;
u32 PciCommandWord;
+ DEBUGFUNC();
+
while (1) { /* Find PCI device(s) */
if ((devno = pci_find_devices(supported, idx++)) < 0) {
break;
hw = (struct e1000_hw *) malloc(sizeof (*hw));
hw->pdev = devno;
nic->priv = hw;
- nic->iobase = bus_to_phys(devno, iobase);
sprintf(nic->name, "e1000#%d", card_number);
hw->autoneg_failed = 0;
hw->autoneg = 1;
hw->get_link_status = TRUE;
- hw->hw_addr = (typeof(hw->hw_addr)) iobase;
+ hw->hw_addr =
+ pci_map_bar(devno, PCI_BASE_ADDRESS_0, PCI_REGION_MEM);
hw->mac_type = e1000_undefined;
/* MAC and Phy settings */