ARMV7: S5P: separate the peripheral clocks
authorMinkyu Kang <mk7.kang@samsung.com>
Tue, 24 Aug 2010 06:51:55 +0000 (15:51 +0900)
committerMinkyu Kang <mk7.kang@samsung.com>
Mon, 30 Aug 2010 05:44:16 +0000 (14:44 +0900)
Because of peripheral devices can select clock sources,
separate the peripheral clocks. (pwm, uart and so on)
It just return the pclk at s5pc1xx SoC,
but s5pc210 SoC must be calculated by own clock register setting.

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
arch/arm/cpu/armv7/s5p-common/timer.c
arch/arm/cpu/armv7/s5pc1xx/clock.c
arch/arm/include/asm/arch-s5pc1xx/clk.h
drivers/serial/serial_s5p.c

index 1f1c7ff340fbc2f776564c61902028f9919bf1d2..04906503e6e40332507211ac070a3d1054eb6301 100644 (file)
@@ -57,7 +57,7 @@ int timer_init(void)
        /*
         * @ PWM Timer 4
         * Timer Freq(HZ) =
-        *      PCLK / { (prescaler_value + 1) * (divider_value) }
+        *      PWM_CLK / { (prescaler_value + 1) * (divider_value) }
         */
 
        /* set prescaler : 16 */
@@ -68,7 +68,7 @@ int timer_init(void)
        if (count_value == 0) {
                /* reset initial value */
                /* count_value = 2085937.5(HZ) (per 1 sec)*/
-               count_value = get_pclk() / ((PRESCALER_1 + 1) *
+               count_value = get_pwm_clk() / ((PRESCALER_1 + 1) *
                                (MUX_DIV_2 + 1));
 
                /* count_value / 100 = 20859.375(HZ) (per 10 msec) */
index c9b54856e3aac74ed71f6444f45354bbf6a2224c..98a27e551dba5a5464e4663c2ead7112c803e5a0 100644 (file)
@@ -38,7 +38,8 @@
 #define CONFIG_SYS_CLK_FREQ_C110       24000000
 #endif
 
-unsigned long (*get_pclk)(void);
+unsigned long (*get_uart_clk)(int dev_index);
+unsigned long (*get_pwm_clk)(void);
 unsigned long (*get_arm_clk)(void);
 unsigned long (*get_pll_clk)(int);
 
@@ -297,15 +298,33 @@ static unsigned long s5pc100_get_pclk(void)
        return get_pclkd1();
 }
 
+/* s5pc1xx: return uart clock frequency */
+static unsigned long s5pc1xx_get_uart_clk(int dev_index)
+{
+       if (cpu_is_s5pc110())
+               return s5pc110_get_pclk();
+       else
+               return s5pc100_get_pclk();
+}
+
+/* s5pc1xx: return pwm clock frequency */
+static unsigned long s5pc1xx_get_pwm_clk(void)
+{
+       if (cpu_is_s5pc110())
+               return s5pc110_get_pclk();
+       else
+               return s5pc100_get_pclk();
+}
+
 void s5p_clock_init(void)
 {
        if (cpu_is_s5pc110()) {
                get_pll_clk = s5pc110_get_pll_clk;
                get_arm_clk = s5pc110_get_arm_clk;
-               get_pclk = s5pc110_get_pclk;
        } else {
                get_pll_clk = s5pc100_get_pll_clk;
                get_arm_clk = s5pc100_get_arm_clk;
-               get_pclk = s5pc100_get_pclk;
        }
+       get_uart_clk = s5pc1xx_get_uart_clk;
+       get_pwm_clk = s5pc1xx_get_pwm_clk;
 }
index c25e17abd7532a3b42190d70ddcfe03eccfef27f..3488eb7c1574ec7b479e80be9169cdf3f022fa45 100644 (file)
@@ -33,6 +33,7 @@ void s5p_clock_init(void);
 
 extern unsigned long (*get_pll_clk)(int pllreg);
 extern unsigned long (*get_arm_clk)(void);
-extern unsigned long (*get_pclk)(void);
+extern unsigned long (*get_pwm_clk)(void);
+extern unsigned long (*get_uart_clk)(int dev_index);
 
 #endif
index 6a61b4fa5dfdbc7cb523239eba77b365ef2b9f2a..77096643f1f87a01eebab57727926bf5f42eea77 100644 (file)
@@ -63,11 +63,11 @@ void serial_setbrg_dev(const int dev_index)
 {
        DECLARE_GLOBAL_DATA_PTR;
        struct s5p_uart *const uart = s5p_get_base_uart(dev_index);
-       u32 pclk = get_pclk();
+       u32 uclk = get_uart_clk(dev_index);
        u32 baudrate = gd->baudrate;
        u32 val;
 
-       val = pclk / baudrate;
+       val = uclk / baudrate;
 
        writel(val / 16 - 1, &uart->ubrdiv);
        writew(udivslot[val % 16], &uart->udivslot);