Add LCD support to MIMC200 board
authorMark Jackson <mpfj-list@mimc.co.uk>
Tue, 21 Jul 2009 10:35:22 +0000 (11:35 +0100)
committerAnatolij Gustschin <agust@denx.de>
Sun, 26 Jul 2009 11:14:33 +0000 (13:14 +0200)
This patch updates the MIMC200 files to enable the LCD.

Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
board/mimc/mimc200/mimc200.c
include/configs/mimc200.h

index 6df741e397625add6a906d88e21f09ea121154bd..78441c3b6507407e9a3422944126dc4c3ddd26d6 100644 (file)
 #include <asm/arch/gpio.h>
 #include <asm/arch/hmatrix.h>
 #include <asm/arch/portmux.h>
+#include <atmel_lcdc.h>
 #include <lcd.h>
 
 #include "../../../cpu/at32ap/hsmc3.h"
 
+#if defined(CONFIG_LCD)
+/* 480x272x16 @ 72 Hz */
+vidinfo_t panel_info = {
+       .vl_col                 = 480,                  /* Number of columns */
+       .vl_row                 = 272,                  /* Number of rows */
+       .vl_clk                 = 10000000,             /* pixel clock in ps */
+       .vl_sync                = ATMEL_LCDC_INVCLK_INVERTED |
+                                 ATMEL_LCDC_INVLINE_INVERTED |
+                                 ATMEL_LCDC_INVFRAME_INVERTED,
+       .vl_bpix                = LCD_COLOR16,          /* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8, 4 = 16 */
+       .vl_tft                 = 1,                    /* 0 = passive, 1 = TFT */
+       .vl_hsync_len           = 42,                   /* Length of horizontal sync */
+       .vl_left_margin         = 1,                    /* Time from sync to picture */
+       .vl_right_margin        = 1,                    /* Time from picture to sync */
+       .vl_vsync_len           = 1,                    /* Length of vertical sync */
+       .vl_upper_margin        = 12,                   /* Time from sync to picture */
+       .vl_lower_margin        = 1,                    /* Time from picture to sync */
+       .mmio                   = LCDC_BASE,            /* Memory mapped registers */
+};
+
+void lcd_enable(void)
+{
+}
+
+void lcd_disable(void)
+{
+}
+#endif
+
 DECLARE_GLOBAL_DATA_PTR;
 
 static const struct sdram_config sdram_config = {
@@ -110,6 +140,10 @@ int board_early_init_f(void)
        portmux_enable_mmci(0, PORTMUX_MMCI_4BIT, PORTMUX_DRIVE_LOW);
 #endif
 
+#if defined(CONFIG_LCD)
+       portmux_enable_lcdc(1);
+#endif
+
        return 0;
 }
 
index 8ff2f8a21e1d92387c385abbbb9c3a5fbdc66216..8f71664f32553939a43787f8b8238998adc2462a 100644 (file)
@@ -82,6 +82,8 @@
 #define CONFIG_DISABLE_CONSOLE         1       /* disable console */
 #define CONFIG_SYS_DEVICE_NULLDEV              1       /* include nulldev device */
 
+#define CONFIG_LCD                     1
+
 /*
  * Only interrupt autoboot if <space> is pressed. Otherwise, garbage
  * data on the serial line may interrupt the boot sequence.
 #define CONFIG_MMC                     1
 #define CONFIG_ATMEL_MCI               1
 
+#if defined(CONFIG_LCD)
+#define CONFIG_CMD_BMP
+#define CONFIG_ATMEL_LCD               1
+#define LCD_BPP                                LCD_COLOR16
+#define CONFIG_BMP_16BPP               1
+#define CONFIG_FB_ADDR                 0x10600000
+#define CONFIG_WHITE_ON_BLACK          1
+#define CONFIG_VIDEO_BMP_GZIP          1
+#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE         262144
+#define CONFIG_ATMEL_LCD_BGR555                1
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV   1
+#define CONFIG_SPLASH_SCREEN           1
+#endif
+
 #define CONFIG_SYS_DCACHE_LINESZ               32
 #define CONFIG_SYS_ICACHE_LINESZ               32