clk: qcom: use divider_ro_round_rate helper

There is now an helper function to round the rate when the
divider is read-only. Let's use it

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

diff --git a/drivers/clk/qcom/clk-regmap-divider.c b/drivers/clk/qcom/clk-regmap-divider.c
index 4e9b8c2c8980a2af785ef1b026cf8d9fb8a6bb73..1ee75a5e93f4e681206326d94f3b56c7ebbb4c8b 100644 (file)
--- a/drivers/clk/qcom/clk-regmap-divider.c
+++ b/drivers/clk/qcom/clk-regmap-divider.c
@@ -28,22 +28,14 @@ static long div_round_ro_rate(struct clk_hw *hw, unsigned long rate,
 {
        struct clk_regmap_div *divider = to_clk_regmap_div(hw);
        struct clk_regmap *clkr = &divider->clkr;
-       u32 div;
-       struct clk_hw *hw_parent = clk_hw_get_parent(hw);
-
-       regmap_read(clkr->regmap, divider->reg, &div);
-       div >>= divider->shift;
-       div &= BIT(divider->width) - 1;
-       div += 1;
-
-       if (clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT) {
-               if (!hw_parent)
-                       return -EINVAL;
+       u32 val;
 
-               *prate = clk_hw_round_rate(hw_parent, rate * div);
-       }
+       regmap_read(clkr->regmap, divider->reg, &val);
+       val >>= divider->shift;
+       val &= BIT(divider->width) - 1;
 
-       return DIV_ROUND_UP_ULL((u64)*prate, div);
+       return divider_ro_round_rate(hw, rate, prate, NULL, divider->width,
+                                    CLK_DIVIDER_ROUND_CLOSEST, val);
 }
 
 static long div_round_rate(struct clk_hw *hw, unsigned long rate,