rdmsrl(MSR_GS_BASE, gs);
rdmsrl(MSR_KERNEL_GS_BASE, shadowgs);
- asm("movq %%cr0, %0": "=r" (cr0));
- asm("movq %%cr2, %0": "=r" (cr2));
- asm("movq %%cr3, %0": "=r" (cr3));
- asm("movq %%cr4, %0": "=r" (cr4));
+ cr0 = read_cr0();
+ cr2 = read_cr2();
+ cr3 = read_cr3();
+ cr4 = read_cr4();
printk("FS: %016lx(%04x) GS:%016lx(%04x) knlGS:%016lx\n",
fs,fsindex,gs,gsindex,shadowgs);
* control registers
*/
rdmsrl(MSR_EFER, ctxt->efer);
- asm volatile ("movq %%cr0, %0" : "=r" (ctxt->cr0));
- asm volatile ("movq %%cr2, %0" : "=r" (ctxt->cr2));
- asm volatile ("movq %%cr3, %0" : "=r" (ctxt->cr3));
- asm volatile ("movq %%cr4, %0" : "=r" (ctxt->cr4));
- asm volatile ("movq %%cr8, %0" : "=r" (ctxt->cr8));
+ ctxt->cr0 = read_cr0();
+ ctxt->cr2 = read_cr2();
+ ctxt->cr3 = read_cr3();
+ ctxt->cr4 = read_cr4();
+ ctxt->cr8 = read_cr8();
}
void save_processor_state(void)
* control registers
*/
wrmsrl(MSR_EFER, ctxt->efer);
- asm volatile ("movq %0, %%cr8" :: "r" (ctxt->cr8));
- asm volatile ("movq %0, %%cr4" :: "r" (ctxt->cr4));
- asm volatile ("movq %0, %%cr3" :: "r" (ctxt->cr3));
- asm volatile ("movq %0, %%cr2" :: "r" (ctxt->cr2));
- asm volatile ("movq %0, %%cr0" :: "r" (ctxt->cr0));
+ write_cr8(ctxt->cr8);
+ write_cr4(ctxt->cr4);
+ write_cr3(ctxt->cr3);
+ write_cr2(ctxt->cr2);
+ write_cr0(ctxt->cr0);
/*
* now restore the descriptor tables to their proper values
pmd_t *pmd;
pte_t *pte;
- asm("movq %%cr3,%0" : "=r" (pgd));
+ pgd = (pgd_t *)read_cr3();
pgd = __va((unsigned long)pgd & PHYSICAL_PAGE_MASK);
pgd += pgd_index(address);
prefetchw(&mm->mmap_sem);
/* get the address */
- __asm__("movq %%cr2,%0":"=r" (address));
+ address = read_cr2();
info.si_code = SEGV_MAPERR;
}
if (!after_bootmem)
- asm volatile("movq %%cr4,%0" : "=r" (mmu_cr4_features));
+ mmu_cr4_features = read_cr4();
__flush_tlb_all();
}
unsigned long cr0;
asm volatile("movq %%cr0,%0" : "=r" (cr0));
return cr0;
-}
+}
static inline void write_cr0(unsigned long val)
{
asm volatile("movq %0,%%cr0" :: "r" (val));
-}
+}
+
+static inline unsigned long read_cr2(void)
+{
+ unsigned long cr2;
+ asm("movq %%cr2,%0" : "=r" (cr2));
+ return cr2;
+}
+
+static inline void write_cr2(unsigned long val)
+{
+ asm volatile("movq %0,%%cr2" :: "r" (val));
+}
static inline unsigned long read_cr3(void)
{
unsigned long cr3;
asm("movq %%cr3,%0" : "=r" (cr3));
return cr3;
-}
+}
static inline void write_cr3(unsigned long val)
{
unsigned long cr4;
asm("movq %%cr4,%0" : "=r" (cr4));
return cr4;
-}
+}
static inline void write_cr4(unsigned long val)
{
asm volatile("movq %0,%%cr4" :: "r" (val) : "memory");
-}
+}
+
+static inline unsigned long read_cr8(void)
+{
+ unsigned long cr8;
+ asm("movq %%cr8,%0" : "=r" (cr8));
+ return cr8;
+}
+
+static inline void write_cr8(unsigned long val)
+{
+ asm volatile("movq %0,%%cr8" :: "r" (val) : "memory");
+}
#define stts() write_cr0(8 | read_cr0())