ARM: PJ4: remove the ARMv6 compatible cache method entries
authorNicolas Pitre <nico@fluxnic.net>
Tue, 3 May 2011 19:30:34 +0000 (15:30 -0400)
committerNicolas Pitre <nico@fluxnic.net>
Tue, 3 May 2011 19:39:05 +0000 (15:39 -0400)
The Marvell PJ4 is ARMv7 capable, so we don't support it in
ARMv6 mode anymore.

Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
Acked-by: Saeed Bishara <saeed.bishara@gmail.com>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
arch/arm/boot/compressed/head.S
arch/arm/mm/proc-v6.S

index adf583cd0c351196cbfb4efe450b845707c7e36c..a36f4526689b8e6b4a3904ff76429a8b91937109 100644 (file)
@@ -735,12 +735,6 @@ proc_types:
                W(b)    __armv4_mmu_cache_off
                W(b)    __armv6_mmu_cache_flush
 
-               .word   0x560f5810              @ Marvell PJ4 ARMv6
-               .word   0xff0ffff0
-               W(b)    __armv4_mmu_cache_on
-               W(b)    __armv4_mmu_cache_off
-               W(b)    __armv6_mmu_cache_flush
-
                .word   0x000f0000              @ new CPU Id
                .word   0x000f0000
                W(b)    __armv7_mmu_cache_on
index 7c99cb4c8e4fb8663158caf9832d6df6e9e27ef4..ab17cc0d3fa7cd5f2d0a97b7c5539789b2f20c09 100644 (file)
@@ -175,11 +175,6 @@ cpu_v6_name:
        .asciz  "ARMv6-compatible processor"
        .size   cpu_v6_name, . - cpu_v6_name
 
-       .type   cpu_pj4_name, #object
-cpu_pj4_name:
-       .asciz  "Marvell PJ4 processor"
-       .size   cpu_pj4_name, . - cpu_pj4_name
-
        .align
 
        __CPUINIT
@@ -305,32 +300,3 @@ __v6_proc_info:
        .long   v6_user_fns
        .long   v6_cache_fns
        .size   __v6_proc_info, . - __v6_proc_info
-
-       .type   __pj4_v6_proc_info, #object
-__pj4_v6_proc_info:
-       .long   0x560f5810
-       .long   0xff0ffff0
-       ALT_SMP(.long \
-               PMD_TYPE_SECT | \
-               PMD_SECT_AP_WRITE | \
-               PMD_SECT_AP_READ | \
-               PMD_FLAGS_SMP)
-       ALT_UP(.long \
-               PMD_TYPE_SECT | \
-               PMD_SECT_AP_WRITE | \
-               PMD_SECT_AP_READ | \
-               PMD_FLAGS_UP)
-       .long   PMD_TYPE_SECT | \
-               PMD_SECT_XN | \
-               PMD_SECT_AP_WRITE | \
-               PMD_SECT_AP_READ
-       b       __v6_setup
-       .long   cpu_arch_name
-       .long   cpu_elf_name
-       .long   HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP|HWCAP_TLS
-       .long   cpu_pj4_name
-       .long   v6_processor_functions
-       .long   v6wbi_tlb_fns
-       .long   v6_user_fns
-       .long   v6_cache_fns
-       .size   __pj4_v6_proc_info, . - __pj4_v6_proc_info