PCI: tegra: Add support to configure sideband pins

Add support to configure sideband signal pins when the information is
present in the respective controller device-tree node.

Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
[bhelgaas: fold in YueHaibing's fix for build error without CONFIG_PINCTRL;
https://lore.kernel.org/r/20190920014807.38288-1-yuehaibing@huawei.com]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Andrew Murray <andrew.murray@arm.com>
Acked-by: Thierry Reding <treding@nvidia.com>

diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
index 6056414c07d4119099aec36962cb8e9caece5a7a..0b870287f6b6f884806355e3bfb92252d50a9195 100644 (file)
--- a/drivers/pci/controller/dwc/pcie-tegra194.c
+++ b/drivers/pci/controller/dwc/pcie-tegra194.c
@@ -22,6 +22,7 @@
 #include <linux/of_pci.h>
 #include <linux/pci.h>
 #include <linux/phy/phy.h>
+#include <linux/pinctrl/consumer.h>
 #include <linux/platform_device.h>
 #include <linux/pm_runtime.h>
 #include <linux/random.h>
@@ -1311,8 +1312,13 @@ static int tegra_pcie_config_rp(struct tegra_pcie_dw *pcie)
        if (ret < 0) {
                dev_err(dev, "Failed to get runtime sync for PCIe dev: %d\n",
                        ret);
-               pm_runtime_disable(dev);
-               return ret;
+               goto fail_pm_get_sync;
+       }
+
+       ret = pinctrl_pm_select_default_state(dev);
+       if (ret < 0) {
+               dev_err(dev, "Failed to configure sideband pins: %d\n", ret);
+               goto fail_pinctrl;
        }
 
        tegra_pcie_init_controller(pcie);
@@ -1339,7 +1345,9 @@ static int tegra_pcie_config_rp(struct tegra_pcie_dw *pcie)
 
 fail_host_init:
        tegra_pcie_deinit_controller(pcie);
+fail_pinctrl:
        pm_runtime_put_sync(dev);
+fail_pm_get_sync:
        pm_runtime_disable(dev);
        return ret;
 }