* to be the base address for the chip, usually in the local
* peripheral bus.
*/
-static unsigned ace_readw(unsigned offset)
-{
-#if (CFG_SYSTEMACE_WIDTH == 8)
- u16 temp;
-
-#if !defined(__BIG_ENDIAN)
- temp = ((u16) readb(CFG_SYSTEMACE_BASE + offset) << 8);
- temp |= (u16) readb(CFG_SYSTEMACE_BASE + offset + 1);
-#else
- temp = (u16) readb(CFG_SYSTEMACE_BASE + offset);
- temp |= ((u16) readb(CFG_SYSTEMACE_BASE + offset + 1) << 8);
-#endif
- return temp;
-#else
- return readw(CFG_SYSTEMACE_BASE + offset);
-#endif
-}
-
-static void ace_writew(unsigned val, unsigned offset)
-{
#if (CFG_SYSTEMACE_WIDTH == 8)
#if !defined(__BIG_ENDIAN)
- writeb((u8) (val >> 8), CFG_SYSTEMACE_BASE + offset);
- writeb((u8) val, CFG_SYSTEMACE_BASE + offset + 1);
+#define ace_readw(off) ((readb(CFG_SYSTEMACE_BASE+off)<<8) | \
+ (readb(CFG_SYSTEMACE_BASE+off+1)))
+#define ace_write(val, off) {writeb(val>>8, CFG_SYSTEMACE_BASE+off); \
+ writeb(val, CFG_SYSTEMACE_BASE+off+1);}
#else
- writeb((u8) val, CFG_SYSTEMACE_BASE + offset);
- writeb((u8) (val >> 8), CFG_SYSTEMACE_BASE + offset + 1);
+#define ace_readw(off) ((readb(CFG_SYSTEMACE_BASE+off)) | \
+ (readb(CFG_SYSTEMACE_BASE+off+1)<<8))
+#define ace_write(val, off) {writeb(val, CFG_SYSTEMACE_BASE+off); \
+ writeb(val>>8, CFG_SYSTEMACE_BASE+off+1);}
#endif
#else
- writew(val, CFG_SYSTEMACE_BASE + offset);
+#define ace_readw(off) (readw(CFG_SYSTEMACE_BASE+off))
+#define ace_writew(val, off) (writew(val, CFG_SYSTEMACE_BASE+off))
#endif
-}
/* */