media: staging: media: davinci_vpfe: Replace a bit shift

This patch replaces bit shifting on 1 with the BIT(x) macro.
This was done with coccinelle:
@@
constant c;
@@

-1 << c
+BIT(c)

[mchehab+samsung@kernel.org: rebase on the top of upstream]
Signed-off-by: Arushi Singhal <arushisinghal19971997@gmail.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>

diff --git a/drivers/media/platform/omap3isp/ispstat.c b/drivers/media/platform/omap3isp/ispstat.c
index 47353fee26c3297234502d6d9ce197ff5098eb0c..953a812bfe5e8d63fce212eadc5da3f300a49d5a 100644 (file)
--- a/drivers/media/platform/omap3isp/ispstat.c
+++ b/drivers/media/platform/omap3isp/ispstat.c
@@ -1040,7 +1040,7 @@ static int isp_stat_init_entities(struct ispstat *stat, const char *name,
 
        v4l2_subdev_init(subdev, sd_ops);
        snprintf(subdev->name, V4L2_SUBDEV_NAME_SIZE, "OMAP3 ISP %s", name);
-       subdev->grp_id = 1 << 16;       /* group ID for isp subdevs */
+       subdev->grp_id = BIT(16);       /* group ID for isp subdevs */
        subdev->flags |= V4L2_SUBDEV_FL_HAS_EVENTS | V4L2_SUBDEV_FL_HAS_DEVNODE;
        v4l2_set_subdevdata(subdev, stat);
 

diff --git a/drivers/staging/media/davinci_vpfe/dm365_isif.c b/drivers/staging/media/davinci_vpfe/dm365_isif.c
index 46fd8184fc77177465bd8c1f762c91920097d3b0..05a997f7aa5d48b382c0a879fc0dc13f96662851 100644 (file)
--- a/drivers/staging/media/davinci_vpfe/dm365_isif.c
+++ b/drivers/staging/media/davinci_vpfe/dm365_isif.c
@@ -816,7 +816,7 @@ isif_config_dfc(struct vpfe_isif_device *isif, struct vpfe_isif_dfc *vdfc)
 
        /* Correct whole line or partial */
        if (vdfc->corr_whole_line)
-               val |= 1 << ISIF_VDFC_CORR_WHOLE_LN_SHIFT;
+               val |= BIT(ISIF_VDFC_CORR_WHOLE_LN_SHIFT);
 
        /* level shift value */
        val |= (vdfc->def_level_shift & ISIF_VDFC_LEVEL_SHFT_MASK) <<
@@ -844,7 +844,7 @@ isif_config_dfc(struct vpfe_isif_device *isif, struct vpfe_isif_dfc *vdfc)
 
        val = isif_read(isif->isif_cfg.base_addr, DFCMEMCTL);
        /* set DFCMARST and set DFCMWR */
-       val |= 1 << ISIF_DFCMEMCTL_DFCMARST_SHIFT;
+       val |= BIT(ISIF_DFCMEMCTL_DFCMARST_SHIFT);
        val |= 1;
        isif_write(isif->isif_cfg.base_addr, val, DFCMEMCTL);
 
@@ -875,7 +875,7 @@ isif_config_dfc(struct vpfe_isif_device *isif, struct vpfe_isif_dfc *vdfc)
                }
                val = isif_read(isif->isif_cfg.base_addr, DFCMEMCTL);
                /* clear DFCMARST and set DFCMWR */
-               val &= ~(1 << ISIF_DFCMEMCTL_DFCMARST_SHIFT);
+               val &= ~BIT(ISIF_DFCMEMCTL_DFCMARST_SHIFT);
                val |= 1;
                isif_write(isif->isif_cfg.base_addr, val, DFCMEMCTL);
 
@@ -1135,7 +1135,7 @@ static int isif_config_raw(struct v4l2_subdev *sd, int mode)
        isif_write(isif->isif_cfg.base_addr, val, CGAMMAWD);
        /* Configure DPCM compression settings */
        if (params->v4l2_pix_fmt == V4L2_PIX_FMT_SGRBG10DPCM8) {
-               val =  1 << ISIF_DPCM_EN_SHIFT;
+               val =  BIT(ISIF_DPCM_EN_SHIFT);
                val |= (params->dpcm_predictor &
                        ISIF_DPCM_PREDICTOR_MASK) << ISIF_DPCM_PREDICTOR_SHIFT;
        }