e1000e: initial support for i219-LM (3)

i219-LM (3) is a LOM that will be available on systems with the
Lewisburg Platform Controller Hub (PCH) chipset from Intel.
This patch provides the initial support for the device.

Signed-off-by: Raanan Avargil <raanan.avargil@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>

diff --git a/drivers/net/ethernet/intel/e1000e/hw.h b/drivers/net/ethernet/intel/e1000e/hw.h
index c9da4654e9cad64b64ee305ea5a2aa37c0906338..b3949d5bef5c3b7e8f86ca2719f1fdf77353ae95 100644 (file)
--- a/drivers/net/ethernet/intel/e1000e/hw.h
+++ b/drivers/net/ethernet/intel/e1000e/hw.h
@@ -91,6 +91,7 @@ struct e1000_hw;
 #define E1000_DEV_ID_PCH_SPT_I219_V            0x1570  /* SPT PCH */
 #define E1000_DEV_ID_PCH_SPT_I219_LM2          0x15B7  /* SPT-H PCH */
 #define E1000_DEV_ID_PCH_SPT_I219_V2           0x15B8  /* SPT-H PCH */
+#define E1000_DEV_ID_PCH_LBG_I219_LM3          0x15B9  /* LBG PCH */
 
 #define E1000_REVISION_4       4
 

diff --git a/drivers/net/ethernet/intel/e1000e/ich8lan.c b/drivers/net/ethernet/intel/e1000e/ich8lan.c
index 64c1f36200333e213b8383cb8abad03f408006ec..a049e30639a13d75cd66185aa225bb3d15847d8e 100644 (file)
--- a/drivers/net/ethernet/intel/e1000e/ich8lan.c
+++ b/drivers/net/ethernet/intel/e1000e/ich8lan.c
@@ -3093,24 +3093,45 @@ static s32 e1000_valid_nvm_bank_detect_ich8lan(struct e1000_hw *hw, u32 *bank)
        struct e1000_nvm_info *nvm = &hw->nvm;
        u32 bank1_offset = nvm->flash_bank_size * sizeof(u16);
        u32 act_offset = E1000_ICH_NVM_SIG_WORD * 2 + 1;
+       u32 nvm_dword = 0;
        u8 sig_byte = 0;
        s32 ret_val;
 
        switch (hw->mac.type) {
-               /* In SPT, read from the CTRL_EXT reg instead of
-                * accessing the sector valid bits from the nvm
-                */
        case e1000_pch_spt:
-               *bank = er32(CTRL_EXT)
-                   & E1000_CTRL_EXT_NVMVS;
-               if ((*bank == 0) || (*bank == 1)) {
-                       e_dbg("ERROR: No valid NVM bank present\n");
-                       return -E1000_ERR_NVM;
-               } else {
-                       *bank = *bank - 2;
+               bank1_offset = nvm->flash_bank_size;
+               act_offset = E1000_ICH_NVM_SIG_WORD;
+
+               /* set bank to 0 in case flash read fails */
+               *bank = 0;
+
+               /* Check bank 0 */
+               ret_val = e1000_read_flash_dword_ich8lan(hw, act_offset,
+                                                        &nvm_dword);
+               if (ret_val)
+                       return ret_val;
+               sig_byte = (u8)((nvm_dword & 0xFF00) >> 8);
+               if ((sig_byte & E1000_ICH_NVM_VALID_SIG_MASK) ==
+                   E1000_ICH_NVM_SIG_VALUE) {
+                       *bank = 0;
                        return 0;
                }
-               break;
+
+               /* Check bank 1 */
+               ret_val = e1000_read_flash_dword_ich8lan(hw, act_offset +
+                                                        bank1_offset,
+                                                        &nvm_dword);
+               if (ret_val)
+                       return ret_val;
+               sig_byte = (u8)((nvm_dword & 0xFF00) >> 8);
+               if ((sig_byte & E1000_ICH_NVM_VALID_SIG_MASK) ==
+                   E1000_ICH_NVM_SIG_VALUE) {
+                       *bank = 1;
+                       return 0;
+               }
+
+               e_dbg("ERROR: No valid NVM bank present\n");
+               return -E1000_ERR_NVM;
        case e1000_ich8lan:
        case e1000_ich9lan:
                eecd = er32(EECD);

diff --git a/drivers/net/ethernet/intel/e1000e/netdev.c b/drivers/net/ethernet/intel/e1000e/netdev.c
index 772447306c133999a6e5a8974bca79b5735ccb4f..775e38910681a617eee363309fd97e90a445afe9 100644 (file)
--- a/drivers/net/ethernet/intel/e1000e/netdev.c
+++ b/drivers/net/ethernet/intel/e1000e/netdev.c
@@ -7467,6 +7467,7 @@ static const struct pci_device_id e1000_pci_tbl[] = {
        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V), board_pch_spt },
        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM2), board_pch_spt },
        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V2), board_pch_spt },
+       { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LBG_I219_LM3), board_pch_spt },
 
        { 0, 0, 0, 0, 0, 0, 0 } /* terminate list */
 };