&gmac2 {
mac-address = [00 11 22 33 44 55];
status = "okay";
+
+ phy-handle = <&phy5>;
+};
+
+&mdio0 {
+ switch@0 {
+ compatible = "mediatek,mt7530";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <ð_default>;
+
+ core-supply = <&mt6323_vpa_reg>;
+ io-supply = <&mt6323_vemc3v3_reg>;
+ reset-gpios = <&pio 33 0>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ port@0 {
+ reg = <0>;
+ label = "lan0";
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan1";
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan2";
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "lan3";
+ };
+
+ port@6 {
+ reg = <6>;
+ label = "cpu";
+ ethernet = <&gmac1>;
+ phy-mode = "trgmii";
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+ };
+ };
+
+ phy5: ethernet-phy@5 {
+ reg = <5>;
+ phy-mode = "rgmii-rxid";
+ };
};
&pwm {
--- /dev/null
+Index: linux-4.9.20/drivers/net/dsa/mt7530.c
+===================================================================
+--- linux-4.9.20.orig/drivers/net/dsa/mt7530.c
++++ linux-4.9.20/drivers/net/dsa/mt7530.c
+@@ -629,6 +629,11 @@ mt7530_setup(struct dsa_switch *ds)
+ val = mt7530_read(priv, MT7530_MHWTRAP);
+ val &= ~MHWTRAP_P6_DIS & ~MHWTRAP_PHY_ACCESS;
+ val |= MHWTRAP_MANUAL;
++ if (!dsa_is_cpu_port(ds, 5)) {
++ val |= MHWTRAP_P5_DIS;
++ val |= MHWTRAP_P5_MAC_SEL;
++ val |= MHWTRAP_P5_RGMII_MODE;
++ }
+ mt7530_write(priv, MT7530_MHWTRAP, val);
+
+ /* Enable and reset MIB counters */
+Index: linux-4.9.20/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+===================================================================
+--- linux-4.9.20.orig/drivers/net/ethernet/mediatek/mtk_eth_soc.c
++++ linux-4.9.20/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+@@ -221,6 +221,9 @@ static void mtk_phy_link_adjust(struct n
+ netif_carrier_on(dev);
+ else
+ netif_carrier_off(dev);
++
++ if (!of_phy_is_fixed_link(mac->of_node))
++ phy_print_status(dev->phydev);
+ }
+
+ static int mtk_phy_connect_node(struct mtk_eth *eth, struct mtk_mac *mac,