net: dsa: felix: Handle PAUSE RX regardless of AN result

Flow control is used with 2500Base-X and AQR PHYs to do rate adaptation
between line side 100/1000 links and MAC running at 2.5G.

This is independent of the flow control configuration settled on line
side though AN.

In general, allowing the MAC to handle flow control even if not
negotiated with the link partner should not be a problem, so the patch
just enables it in all cases.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/dsa/ocelot/felix.c b/drivers/net/dsa/ocelot/felix.c
index 269cc6953d47abd562cd75632458af0472b4adb4..8a38290c29fd173c3ef15d4045da92a51605e2fd 100644 (file)
--- a/drivers/net/dsa/ocelot/felix.c
+++ b/drivers/net/dsa/ocelot/felix.c
@@ -222,8 +222,12 @@ static void felix_phylink_mac_config(struct dsa_switch *ds, int port,
         * specification in incoming pause frames.
         */
        mac_fc_cfg = SYS_MAC_FC_CFG_FC_LINK_SPEED(state->speed);
-       if (state->pause & MLO_PAUSE_RX)
-               mac_fc_cfg |= SYS_MAC_FC_CFG_RX_FC_ENA;
+
+       /* handle Rx pause in all cases, with 2500base-X this is used for rate
+        * adaptation.
+        */
+       mac_fc_cfg |= SYS_MAC_FC_CFG_RX_FC_ENA;
+
        if (state->pause & MLO_PAUSE_TX)
                mac_fc_cfg |= SYS_MAC_FC_CFG_TX_FC_ENA |
                              SYS_MAC_FC_CFG_PAUSE_VAL_CFG(0xffff) |