pinctrl: mvebu: armada-{370,375}: normalize audio pins
authorThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tue, 9 Jun 2015 16:47:10 +0000 (18:47 +0200)
committerLinus Walleij <linus.walleij@linaro.org>
Wed, 10 Jun 2015 11:43:52 +0000 (13:43 +0200)
This commit aligns the naming of the audio 'lrclk' pin accross Marvell
SoCs.

Since only the subname is changed, the DT backward compatibility is
not affected.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Documentation/devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt
Documentation/devicetree/bindings/pinctrl/marvell,armada-375-pinctrl.txt
drivers/pinctrl/mvebu/pinctrl-armada-370.c
drivers/pinctrl/mvebu/pinctrl-armada-375.c

index 24a745008a3314d8f2d40fcdaaf56f4738903356..cc0be9df70823685102c9a52bce86d432dd1891c 100644 (file)
@@ -88,7 +88,7 @@ mpp58         58       gpio, dev(cs0), uart1(rts), tdm(int), audio(extclk),
 mpp59         59       gpo, dev(ale0), uart1(rts), uart0(rts), audio(bclk)
 mpp60         60       gpio, dev(ale1), uart1(rxd), sata0(prsnt), pcie(rstout),
                        audio(sdi)
-mpp61         61       gpo, dev(we1), uart1(txd), audio(rclk)
+mpp61         61       gpo, dev(we1), uart1(txd), audio(lrclk)
 mpp62         62       gpio, dev(a2), uart1(cts), tdm(drx), pcie(clkreq0),
                        audio(mclk), uart0(cts)
 mpp63         63       gpo, spi0(sck), tclk
index f942a006a814227461a9bf750ed68d2308c774dd..06e5bb0367f5270fcbe959de96a778e59ce02ecb 100644 (file)
@@ -19,7 +19,7 @@ mpp2          2        gpio, dev(ad4), ptp(evreq), led(c0), audio(sdi)
 mpp3          3        gpio, dev(ad5), ptp(trig), led(p3), audio(mclk)
 mpp4          4        gpio, dev(ad6), spi0(miso), spi1(miso)
 mpp5          5        gpio, dev(ad7), spi0(cs2), spi1(cs2)
-mpp6          6        gpio, dev(ad0), led(p1), audio(rclk)
+mpp6          6        gpio, dev(ad0), led(p1), audio(lrclk)
 mpp7          7        gpio, dev(ad1), ptp(clk), led(p2), audio(extclk)
 mpp8          8        gpio, dev (bootcs), spi0(cs0), spi1(cs0)
 mpp9          9        gpio, spi0(sck), spi1(sck), nand(we)
index 6ecec90712768dd824305761d5e6ae1f5a2081b3..54fec8cc608cf0aa35ecd6544f664d12ef81565f 100644 (file)
@@ -354,7 +354,7 @@ static struct mvebu_mpp_mode mv88f6710_mpp_modes[] = {
           MPP_FUNCTION(0x0, "gpo", NULL),
           MPP_FUNCTION(0x1, "dev", "we1"),
           MPP_FUNCTION(0x2, "uart1", "txd"),
-          MPP_FUNCTION(0x5, "audio", "rclk")),
+          MPP_FUNCTION(0x5, "audio", "lrclk")),
        MPP_MODE(62,
           MPP_FUNCTION(0x0, "gpio", NULL),
           MPP_FUNCTION(0x1, "dev", "a2"),
index 4d3e23517bed37f800b6f2441f6e7ada35023be5..54e9fbd0121f795f11ec53d5326b458d6d70a42f 100644 (file)
@@ -81,7 +81,7 @@ static struct mvebu_mpp_mode mv88f6720_mpp_modes[] = {
                 MPP_FUNCTION(0x0, "gpio", NULL),
                 MPP_FUNCTION(0x1, "dev", "ad0"),
                 MPP_FUNCTION(0x3, "led", "p1"),
-                MPP_FUNCTION(0x4, "audio", "rclk"),
+                MPP_FUNCTION(0x4, "audio", "lrclk"),
                 MPP_FUNCTION(0x5, "nand", "io0")),
        MPP_MODE(7,
                 MPP_FUNCTION(0x0, "gpio", NULL),